I found a schematic to fire a scr with the highest possible efficiency at a load with a pulse of more than 2.5KA. I have the t508n16tof as the main one (x3) and it needs a max gate voltage of 2V and 200mA and the scr for clean pulse would be the mcd40-12io6 with gate 1.5V max and 100mA. I will use a 12V source for V4. So what values of R4 and R5 should I use for the mcd40-12io6? and for C2 I leave it as is? just by switching to a 2v zener? or charge C2 to 2v and increase the capacitance a little more to have the current pulse?

 

What is the source of the power that is delivered to the load?
How can the claim of "highest possible efficiency" be justified?

 

How can the claim of "highest possible efficiency" be justified?

In order to maximize its potential for conducting short, high magnitude electrical impulses the SCR gate must be given a sharp current pulse several orders of magnitude greater than the nominal junction trigger ratings. This rapid pulse allows the junction to go from non conducting to fully conductive state as quickly as possible, hence minimizing junction heating due to ohmic current absorption at the trigger phase.


I want to do something similar from this page https://www.powerelectronicsnews.co...tor-for-power-choke-measurements-up-to-10-ka/

What is the source of the power that is delivered to the load?

 

A justification for "highest possible efficiency" requires some mathematics. A two-sentence paragraph is "thin gruel" for that purpose, and it is just not making it for me.

You also switched schematics on me. So, why do we have to consider two different schematics?

Why are you so adverse to including component information on your schematics? Without such information your claims are nearly impossible to investigate or verify.

 

A justification for "highest possible efficiency" requires some mathematics. A two-sentence paragraph is "thin gruel" for that purpose, and it is just not making it for me.

Let's see if you understand me now, the max efficiency thing, well, we'll put that in the background.

You also switched schematics on me. So, why do we have to consider two different schematics?

Well I got a bit confused there the schematic of the last one I sent would be how I am going to put together my circuit all together and the first would be the scr trigger of that circuit there the schematic of the last one I sent would be how I am going to assemble my circuit all together and the first would be the scr trigger of that circuit so I want to modify the values of the provided circuit to be able to use it with the 2 scr I have , which control the capacitor bank discharge 4800uF at 900Vdc max where it would be charged with a variable source and it would be discharged through inductors that I will to try and make measurements like this one on the website. Well now the main scr circuit (x3) for the discharge is the t508n16tof as the main one (x3) and it needs a max gate voltage of 2V and 200mA and the scr for clean pulse would be the mcd40-12io6 with gate 1.5V max and 100mA. I will use a 12V source for V4. So what values of R4 and R5 should I use for the mcd40-12io6? and for C2 I leave it as is? just by switching to a 2v zener? or charge C2 to 2v and increase the capacitance a little more to have the current pulse?


It's just that I'm not averse to sharing the components of the schematics. It's just that I made it a bit tangled and simplified. I'm sorry and I speak about 20% of English?
Well for now I just want the firing circuit to work. I still don't have the power source

 

In order to maximize its potential for conducting short, high magnitude electrical impulses the SCR gate must be given a sharp current pulse several orders of magnitude greater than the nominal junction trigger ratings.

One way to do that is with PUT (Programmable Unijunction Transistor), such as the 2N6027 which can rapidly (<100ns) discharge a capacitor into the SCR gate.

 

Hi,
R4,R5- leave as they are. Use D1 of higher power rating and low impedance.
Ensure proper wire layout to X3 - twisted pair , screened cable, properly earthed