How many slaves can be connected in one QSPI (Quad SPI) ? and, Can I use SPI chip selection pins for the QSPI chip selection?.

MrSalts

Joined Apr 2, 2020
2,350
Hello Everyone,

I would like to know that how many slave devices can be connected to the one QSPI?.
It depends how many ENABLE lines you can control with your microcontroller plus glue-logic. The spi device on a line is only listening to instructions if the enable pin is active.
 

Thread Starter

pinkyponky

Joined Nov 28, 2019
309
It depends how many ENABLE lines you can control with your microcontroller plus glue-logic. The spi device on a line is only listening to instructions if the enable pin is active.
Hi,

I have 6 slave devices (of ADC's) in my application. So, I need to connect those 6 slaves on the single QSPI channel. Here, I'm using the QSPI for faster data throughput.

On the Microcontroller side, I have 1-QSPI and 2-SPI channels.

Since I have only 1-QCS (Chip Select) for QSPI channels, and I have 8-NPCS_0,1,2,3 (4 Chip Selects for each SPI channels; 4x2=8) for SPI. Here, I have a question, can I use those SPI chip selection pins (NPCS) for the selection of 6 slave devices on the QSPI since I have only one chip selection on QSPI?. If not, then, Can I use GPIO pins as a chip selection of the QSPI channel?.

And also, Is it a good idea to use 6 slaves on a single QSPI channel?.

Thank you for the quick response, MrSalts!.
 
Last edited:

MrSalts

Joined Apr 2, 2020
2,350
I've only used QSPI for grabbing data off of some flash memory. Your questions are beyond my memory. You'll have to wait for someone with more in-depth experience on QSPI or you'll have to take a deep dive into the datasheets of your devices. Sorry.
 

nsaspook

Joined Aug 27, 2009
10,406
Hi,

I have 6 slave devices (of ADC's) in my application. So, I need to connect those 6 slaves on the single QSPI channel. Here, I'm using the QSPI for faster data throughput.

On the Microcontroller side, I have 1-QSPI and 2-SPI channels.

Since I have only 1-QCS (Chip Select) for QSPI channels, and I have 8-NPCS_0,1,2,3 (4 Chip Selects for each SPI channels; 4x2=8) for SPI. Here, I have a question, can I use those SPI chip selection pins (NPCS) for the selection of 6 slave devices on the QSPI since I have only one chip selection on QSPI?. If not, then, Can I use GPIO pins as a chip selection of the QSPI channel?.

And also, Is it a good idea to use 6 slaves on a single QSPI channel?.

Thank you for the quick response, MrSalts!.
In general without knowing controller specific QSPI, SPI datasheet or driver details.

QSPI chip select is just like normal SPI chip select with half-duplex operation but usually the CS control is via the QSPI master protocol slave-select per connected device (like Nor Flash) because the driver transfer chain (QSPI, FIFO BUFFERS, DMA, INTERRUPTS) task will likely be asynchronous (non-blocking) to the calling task if the software is written correctly without busy-wait polling. The calling task then won't be able to directly correctly control GPIO CS for each needed slave device unless there is a call-back or some sort of feedback from the driver task to indicate transfers are complete or at least some sort of transfer state update.

GPIO CS controlled by xSPI buffer transfer complete interrupt example:
C:
/*
* enable BMA490L CS and set flags
*/
bool imu_cs(imu_cmd_t * imu)
{
    if (imu) {
        switch (imu->device) {
        case 0:
        default:
            imu->run = true;
            IMU_CS_Clear();
            // set SPI receive complete callback
            SPI2_CallbackRegister(imu_cs_cb, (uintptr_t) imu);
            break;
        }
        return true;
    } else {
        return false;
    }
}

/*
* force BMA490L CS disabled
*/
void imu_cs_disable(imu_cmd_t * imu)
{
    if (imu) {
        switch (imu->device) {
        case 0:
        default:
            imu->run = false;
            IMU_CS_Set();
            break;
        }
    }
}

/*
* SPI interrupt completed callback
* disables BMA490L CS and sets flags
*/
void imu_cs_cb(uintptr_t context)
{
    imu_cmd_t * imu = (void*) context;

    if (imu) {
        switch (imu->device) {
        case 0:
        default:
            IMU_CS_Set();
            imu->run = false;
            break;
        }
    }
}
Can I use GPIO pins as a chip selection of the QSPI channel? Yes, but it won't likely be a simple select/deselect if you really want to take advantage of the speed boost (transfer speed, cpu time reduction) possible unless the xSPI driver has the capability to manage GPIO CS lines for you.

https://embeddedinventor.com/quad-spi-everything-you-need-to-know/

A QSPI interface ADC.
https://www.ti.com/lit/ds/symlink/ads8920b.pdf?ts=1661534322499
 
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Thread Starter

pinkyponky

Joined Nov 28, 2019
309
Hi Again,

Coming back to discuss about the SPI.

Here, I would like to use the parallel communication on SPI, like I want through the data out from the ADC to MCU on 4 lines (such as SDO0, SDO1, SDO2, SDO3), and again send the data back to ADC from MCU on 1 line (such as SDI). For this communication, my MCU not having parallel communication support on MCU side, but I have ADC that will support this parallel communication.

Therefore, I would like to use the Parallel-In and Serial-Out Shift Registers for this communication between the ADC and MCU. Does it works?, If not, please could you suggest me the good solution for this?.

Thank you..
 
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