Just for the record, this isn't a BCD counter. It is a binary counter hooked up on a Bin-to-BCD converter / 7-seg driver.
In order to count down from 9 to 0 and use only FFs to generate the numbers, you need some way to load number 9 paralelly at the start of each count cycle. But in an asynchronous circuit that doesn't seem possible.
If anyone has a different opinion, I would gladly hear it.
If I where you, I would consider using a synchonous counter like the "down counter" in this page http://www.allaboutcircuits.com/vol_4/chpt_11/3.html and find a way to implement a parallel load. This can be done with a few logic gates and four 2-to-1 MUXs. It can be a bit tricky, though. Ask further if you have more questions.
P.S. Does anyone know if the T-FFs in the datasheet are set with input T=1, and thus change state in every clock cycle? No direct reference on the FF input is made.
Ok, since you can do the count up, 0 to 9. Can you put NOT gates at the outputs to invert the output? 0 becomes 9, and 9 becomes 0. The overall effect is count down.