eetech00 - I have studied your very detailed explanation and have a couple of questions.

1) For the pMOS, you write -20V, 2A. Does this mean Vdss should me a "minimum" of 20V, so you don't fry the pMOS?
2) Also for the pMOS, does the 2A simply mean that it needs to be able to handle "maximum" of 2A?
3) FQU17P06 is about $0.40 from Newark (such a deal!). It has Vdss -60V, and Id -12A. Does that meet the criteria, and am I reading the spec correctly? There are so many parameters listed on the cut sheet - it is hard to decipher all of the information and what is relevant to the design.

As C1 continues to charge up, the voltage at the base of Q1 gradually decreases at a rate determined by [R1|R2R3]C1.
4) Is the terminology/theory here called a "bridge"?
5) Why use 3 resistors, and how do you decide on the relative resistance values of each resistor?

 

eetech00 - I have studied your very detailed explanation and have a couple of questions.
1) For the pMOS, you write -20V, 2A. Does this mean Vdss should me a "minimum" of 20V, so you don't fry the pMOS?

Yes. That would be minimum VDS -20V.

2) Also for the pMOS, does the 2A simply mean that it needs to be able to handle "maximum" of 2A?

"2A" was left over from a previous application. Max Id (drain current) rating should be about 75% greater than the load current. So if the coil current is 56ma, you can use Id= 100ma min.

3) FQU17P06 is about $0.40 from Newark (such a deal!). It has Vdss -60V, and Id -12A. Does that meet the criteria, and am I reading the spec correctly? There are so many parameters listed on the cut sheet - it is hard to decipher all of the information and what is relevant to the design.

Yes...that should work fine.

As C1 continues to charge up, the voltage at the base of Q1 gradually decreases at a rate determined by [R1|R2R3]C1.
4) Is the terminology/theory here called a "bridge"?

no. It is based on RC time constant equation(s). However, the RC charge time (and pulse width) is influenced by the current draw thru the base of Q1,
causing it to be quicker.

5) Why use 3 resistors, and how do you decide on the relative resistance values of each resistor?

R3 is intended to ensure Q1 is fully turned off. But you can probably remove R3 since there is already an existing pull down resistor (R1). R2 is a current limiter for Q1. If you remove R3, readjust R1 for the desired pulse width. Replace R1 with a 100k pot if you wish.

 

Has any note been made of 14V PS V rise time at turn on? If it is slightly
slow then a larger C would be required or use transistor circuit.

 

Has any note been made of 14V PS V rise time at turn on? If it is slightly
slow then a larger C would be required or use transistor circuit.

I am sure that the apparent rise is really a simulator artifact. The actual rise time of the load voltage is caused by the solenoid inductance.

 

eetech00 - I have ngspice/Kicad running on my Debian box. I have been able to model and sim the non-transistor design.
When I add the transistors I run into some problems. The Kicad developers are helping me with the software specific
problems, but it would be helpful if I could compare to the LTSpice model you ran.

Would it be possible to get your project file or other inputs?

Thanks in advance,
Gregg G.

 

eetech00 - I have ngspice/Kicad running on my Debian box. I have been able to model and sim the non-transistor design.
When I add the transistors I run into some problems. The Kicad developers are helping me with the software specific
problems, but it would be helpful if I could compare to the LTSpice model you ran.

Would it be possible to get your project file or other inputs?

Thanks in advance,
Gregg G.

Hi

Sure.

Here is a variation that uses all mosfets instead of a BJT.
It also shows calculation of pulse width, PW, using mosfets.

The PW is calculated using the gate threshold voltage VGS(th) of M1 from the datasheet.
The LTspice 2N7002 VGS(th)=1.3

PW= -ln(Vth/Vcc)*(R*C)
Where Vth=VGS(th) typical from data sheet.

Files attached.

 

Well, the developers of Kicad run the model I tried to create (with a couple of corrections) and get the same results you do. I use their corrected input, but get different results.
So now I'll have to track
down a possible installation error on my system. It's fascinating to me that such a "simple" circuit can generate so many different approaches, and that studying this one problem can be such a learning experience for me. I've picked up more electronics
information in the last week than in a long time previous!

A lot of other forums I have used in the past (not electronics related) have not been nearly as helpful or as willing to
tolerate a real newbie.

Kind regards,
Gregg G.

 

I actually built two solenoid driver circuits.
#1 was a hot and hold for a rotary solenoid for a fiber optic light source. It needed lots of cooling. It was in the lamp housing, so I had plenty of air. I really didn't have to worry about saving energy.

I had to use a similar circuit for pulsing a 24 position rotary solenoid too.

#2 Was very different. I wanted to activate the solenoid slowly for a light source shutter that would have a duty cycle of ~3min on ~3min off, manually controlled, during an entire day. It was near a very thin filter that cost about $1000.00 USD. For that, I used a Velleman PWM motor controller that I got from Jameco. the "slow turn on" feature was all I needed.

Plan was to get more complicated if needed.

The PWM method would save on energy too. There are injector driver chips now.