power supplies: VDD = +5V, VSS = -5V
transistors: Vtp = Vtn = 0.3V and (k'W/L)p = (k'W/L)n = 1mA/V2
Neglect the body effect and channel length modulation unless otherwise noted.

I have to design a circuit to do what is indicated in the picture. I can use transistors, power supplies, and passive components.


The picture that shows the function indicated is attached

 

You need to show your best attempt at a solution (remember, it is YOUR homework, after all). We will then be happy to help steer you in the right direction.

But here's a hint -- have you been studying current mirrors recently?

 

Well I attempted to just put in a transistor with the source attached to a node that connects the current source and resistor, the drain connected to Vdd and the gate having a current that offsets the 50 microAmps of the current source, but I'm not sure how to due this exactly/

 

I read about current mirrors and it seems I would have to use a npn Transistor or pnp Transistor, but for this problem I need to use a MOSFET. Would a current mirror work using a MOSFET transistor.?

 

I read about current mirrors and it seems I would have to use a npn Transistor or pnp Transistor, but for this problem I need to use a MOSFET. Would a current mirror work using a MOSFET transistor.?

Yes, the same principles apply. In fact, MOSFETs make better mirrors in certain ways because you can distribute the programming voltage to a practically unlimited number of mirrors (particularly for a DC bias current).

 

Oh wait I found out how to do it with a MOSFET. Ok I will attempt to solve it with a current mirror and see how that goes.

 

Well I attempted to just put in a transistor with the source attached to a node that connects the current source and resistor, the drain connected to Vdd and the gate having a current that offsets the 50 microAmps of the current source, but I'm not sure how to due this exactly/

This is really a pretty poor problem unless a set of design constraints is provided that isn't shown.

As shown, all you need to do is tie the left hand port to ground (or Vdd or Vss -- you just need to complete a circuit) and put a resistor between Vdd and the right hand port to drop the necessary voltage. But I doubt that would be an acceptable solution despite satisfying the problem as shown.

Have you been given any other constraints? What topics have you been studying that this assignment is related to?

 

Well the only constraints where the VDD/VSS/Vt values otherwise I think we have a lot of freedom. We covered MOSFET circuits at AC and DC, Small Signal Operation and Models/T equivalent circuits and also MOSFET in ternal Capacitances and high frequency models

 

Then use the approach I suggested. Or tie the two ports together and also attach a resistor to Vdd to supply 150uA.

What is YOUR understanding, based on the context in which the problem was assigned, of the intended contraints?

 

I think that the method you described shouldn't violate any constraints since my professor is very specific about certain constraints in other problems. Thank You so much!

 

Good luck. If I had given such a problem and not provided specific constraints, I would have maintained that the association to the material being covered provided implied constraints. Even so, I would have been sympathetic to students that offered up a solution such as the one I proposed, while pointing out to them that they might want to rework it since they would be likely to see it, with proper explicit constraints, on an upcoming exam.