Hello,
I am having trouble understanding how to properly interface the NB6L295MMNG delay‑line IC.
I want to drive the NB6L295MMNG input directly from my Si5351A‑B‑GT programmable CMOS clock generator, but I find the single‑ended input interface in the NB6L295MMNG datasheet confusing. The datasheet only shows two diagrams, and neither includes an explanation of how to configure the single‑ended interface. In particular, the way Vref/Vth is connected differs between the two figures (I understand that one is for AC‑coupling), but it is still unclear how I should correctly connect the input and Vth for my use case.


I would also appreciate it if someone could tell me a good method for generating Vth (reference voltage, resistor divider, etc.).
Thank you for you're help!
Domen
I am having trouble understanding how to properly interface the NB6L295MMNG delay‑line IC.
I want to drive the NB6L295MMNG input directly from my Si5351A‑B‑GT programmable CMOS clock generator, but I find the single‑ended input interface in the NB6L295MMNG datasheet confusing. The datasheet only shows two diagrams, and neither includes an explanation of how to configure the single‑ended interface. In particular, the way Vref/Vth is connected differs between the two figures (I understand that one is for AC‑coupling), but it is still unclear how I should correctly connect the input and Vth for my use case.


I would also appreciate it if someone could tell me a good method for generating Vth (reference voltage, resistor divider, etc.).
Thank you for you're help!
Domen
