New guy here. Title is vague but I am super new to this as I am completely self taught using LogiSim. I am trying to learn the function of a sort of basketball scoreboard circuit that a friend of mine made but is not around to explain to me.

Specifically I don't understand a particular IC, screenshot shown below, as well as the main circuit. The way the basketball scoreboard works is, if I hit start, I can use a button for "Team A" and a button for "Team B" to add points to either team. I can then give a particular IC EIGHT pulses, and it will then start taking the inputs from the buttons and display them on the set of 7-segs for the next successive quarter of the game. Not shown is a final set of SIX 7-segments, three per team, that show the total score per team.

Can anyone give me an in depth analysis of this ICs function or perhaps an article that can teach me about it? I don't understand decoders that well yet, I suppose.


Inside the counter IC


Whole circuit. The only portion not shown is the 7-segs/decade counters/BCD converters for the fourth quarter, and then the comparator and 7-segs for the display of the final score. My question is in the IC that is labeled "Timer."

 

The simple things first.
A basic decoder takes n inputs and puts a high (logic 1) on one of 2^n outputs, according to the "value" on the n inputs. For example, a 2 to 4 decoder has 2 inputs and 4 outputs. Call these outputs Y0, Y1, Y2, and Y3. If the inputs are 00, then Y0 is high (asserted); 01 then Y1 is high; 10 then Y2 is high; 11 then Y3 is high. Note that only 1 of the 4 outputs is high at a time.

Your circuit appears to have a 5 to 32 decoder. Similarly to the 2 to 4 decoder I described above, the 5 to 32 decoder will put a high on one of the 32 outputs, depending on the 5-bit input value.

 

That is one strange clock circuit. It looks like it is acting as a 4-stage shift register, enabling one set of displays for each 8 input clock cycles. Are the game quarters 8 minutes long?

What is the frequency of the clock input to the Timer chip?

Is the Timer chip an industry standard part number or a programmed logic device?

The drawings will be much easier to understand and discuss if you add net names to the signal connections.

There are several ways to implement a quarter-to-quarter enable circuit that is less complex and less obtuse. Are you looking to clean up the present design, or are you stuck with it and just want to understand its operation?

ak

 

That is one strange clock circuit. It looks like it is acting as a 4-stage shift register, enabling one set of displays for each 8 input clock cycles. Are the game quarters 8 minutes long?

What is the frequency of the clock input to the Timer chip?

Is the Timer chip an industry standard part number or a programmed logic device?

The drawings will be much easier to understand and discuss if you add net names to the signal connections.

There are several ways to implement a quarter-to-quarter enable circuit that is less complex and less obtuse. Are you looking to clean up the present design, or are you stuck with it and just want to understand its operation?

ak

Hi there and thank you for your answer. So far as I'm concerned the frequency is ambiguous and is only relevant to me within this simulation, but if you would like to expand on how that would impact this circuit please feel free.

The timer chip is a programmed logic device, that is all.

I am just looking to understand the operation of the timer circuit. That is my first priority. But if you would also like to expand on how to implement another less complex circuit, feel free. Thank you for your help.

 

Looking at the "schematic" for the timer chip, the first drawing in the OP.

The first part (left most in the sketch) I think is a 5 bit counter, range 0 to 31 (dec), or 0 to 1F (hex). It counts 0 to 31, then resets itself back to 0.

The 5 to 32 decoder feeds 4 8-input OR gates. The decoder and the OR gates are wired such the output of the first OR gate is high for counts 0-7; the next OR gate's output is high for counts 8-15, etc, up the 4th OR gate who's output is high for counts 24-31.

Note of caution on your schematic. Be careful where you put dots or circles, especially if they're near a component. A circle on an input or output changes the function of that part, assuming the drawing accurately represents the part.

 

The 5 to 32 decoder feeds 4 8-input OR gates. The decoder and the OR gates are wired such the output of the first OR gate is high for counts 0-7; the next OR gate's output is high for counts 8-15, etc, up the 4th OR gate who's output is high for counts 24-31.

Thanks so much for your help. Any idea why the circuit is made to switch quarters on the count of 8 pulses?

Meaning, why 0-31?