help drawing logic diagram

Thread Starter

gammaman

Joined Feb 14, 2009
29
I have no idea how to approach this. It does not seem clear to me.
Can someone clarify or give me a source to help me do this.



The standard alphanumeric binary code is the ASCII(AmericanSttandard code for Information Interchange) which uses seven bits to code 128 characters. Binary information transmitted through network communication is subject to external noise. The detected errors cannot be corrected but their presence is indicated. The usual procedure is to use the parity bit. A parity bit is an extra bit included with ASCII code. The P(odd) bit is chosen to make the sum of all of 1’s odd. The P(even) bit is chosen to make the sum of all of 1’s even.

During transfer of information from one location to another, the parity bit is handled as follows. At the sending end, the message (in ASCII code) is applied to a parity generator, where the most significant bit is the Parity bit. At receiving end, all the incoming bits are applied to a parity checker that checks the proper parity adopted (odd or even). If there are no errors, the parity bit will be removed from message. Otherwise the message will not be acknowledged as received and the message will have to be retransmitted.

Parity generator and checker networks are logic circuits. Your job is to construct both circuits for sending and receiving sides in the same location. The location can control line for sending or receiving ASCII code.
 
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