I need to design a 4 bit processor that can perform the following 8 functions on R, a 4 D flip flop register that stores the internal state, and L, the literal inputs:

Arithmetic:
- W = W + L
- W = arithmetic shift left(W)
- W = W + 1
- W = W - 1

Logic:
- W = 0 (clear)
- W = W (hold)
- W = L
- W = 1's cm(W)

Implementing the functions themselves shouldn't be too much of an issue, but I'm stuck on hardware limitations... We're only allowed to use four 4 to 1 muxes, which seems to be just enough to implement either the logic or arithmetic functions but not both. I've been stuck on this all day, does anyone have any idea how I could go about this?

 

what other limitations do you have?
i don't really see the need for 4 MUXs (though i haven't looked closely), are you familiar with Parallel/serial registers?

 

Note: I forgot to mention all numbers are represented in 2's complement.

This is how I'm trying to implement it now, but it may not be right. The overall ALU is built out of 4 seperate 1-bit ALU's (I'll call ALU slices). Obviously this is still in progress, but here are some images:

ALU slices:

• Schematic - http://i.imgur.com/cPJjD.jpg
• Device symbol - http://i.imgur.com/Y6Ryd.jpg

Overall ALU:

• Schematic - http://i.imgur.com/VhsQxh.jpg
• Device Symbol - http://i.imgur.com/Iz6EP.jpg

The ALU slices output the result of the function (F) and the carry out (Cout). The carry in for the least significant ALU slice is determined by the 3 bit operation code in the control unit, which I haven't designed yet (I'm setting the ALU inputs manually with binary switches for now).

In each slice, the full adders always use the corresponding bit from the register as well as the carry in. The third input is determined by the mux. The way I have it now, I can get the correct outputs for the hold, increment, add and arithmetic left shift (by adding R to R). Clear works, but it isn't a true reset because it just subtracts R from R (by adding the 2's complement of R). This table demonstrates what I mean: http://i.imgur.com/lPtu3.jpg

Hopefully that clearly explains why I need the muxes. Now, while I do get the correct outputs for those functions with the manual input, I run into the problem of not having an initial value in the register when I use it instead of switches. If you could run a true clear function before anything else and set the register to 0000, I think it would work, but I have no way of directly loading 0's into the register.

 

I 'll try to get around the problem, by interpreting the rules "differently". You said you had to use no more than four 4-to-1 MUXs. Are they explicitly described as 1-bit MUXs? I would use four 4-to-1 4-bit MUXs if I where in your shoes, unless the rules strictly prevented me from doing it.
Anyway, I don't think the problem is designed to be that hard. I believe my interpretation is the intended one.

That said, remember that you can put MUXs in the output, after the FA, allowing you to implement actions such as W=L, W=0 and W=1.