Hartley oscillator doesn't start anymore.

Thread Starter

patpin

Joined Sep 15, 2012
401
You should measure alternating current between top and bottom of red sine, not between top and ground.
Also between top and bottom of green sine.
Then compare.
Thanks for info. I thought average current was the most important but indeed there is the offset...
 

Thread Starter

patpin

Joined Sep 15, 2012
401
You should measure alternating current between top and bottom of red sine, not between top and ground.
Also between top and bottom of green sine.
Then compare.
They are equal, only shifted vertically.
Shift level does not transform to coupled inductance.
Indeed yr design is very good and compact to realize. Many thanks!!
 

Danko

Joined Nov 22, 2017
1,823
I have made the schematic of post #38. Here is my result at Q1c. Is there a way to ameliorate the sinus?
Try to increase value of resistor R2.
EDIT:
Where are from these voltage levels on oscilloscope screen:
13.8V ? 28V ? What is power supply voltage?
Sine is clipped on top. Seems like transistor breakdown at 28V level.
 
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Danko

Joined Nov 22, 2017
1,823
I changed R2 between 820 and 5.8K: no change of the sinus
I see.
My questions:
Where are from these voltage levels on oscilloscope screen:
13.8V ? 28V ? What is power supply voltage?
Sine is clipped on top. Seems like transistor breakdown at 28V level.
And more:
Where on yellow curve is zero voltage? On top of sine or bottom?
Where in circuit are connected probe and ground clip?
Can you show, what is, exactly, circuit you made?
EDIT:
Show please oscillogram from point where connected R2, C2 and C3 together.
 
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Thread Starter

patpin

Joined Sep 15, 2012
401
I see.
My questions:
Where are from these voltage levels on oscilloscope screen:
13.8V ? 28V ? What is power supply voltage?
Sine is clipped on top. Seems like transistor breakdown at 28V level.
And more:
Where on yellow curve is zero voltage? On top of sine or bottom?
Where in circuit are connected probe and ground clip?
Can you show, what is, exactly, circuit you made?
EDIT:
Show please oscillogram from point where connected R2, C2 and C3 together.
Freq 684 KHz. Zero on yellow is at 1/5 of signal height (near to bottom). Top is at 13.7V; bottom of sinus at -0,7V; Probe ground = circuit ground.
Green is now on mentioned node. Top is 0,4V; bottom -0,42V.
 

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Danko

Joined Nov 22, 2017
1,823
Thank you for detailed answer.
For now:
Change C1 from 10n to 100n and connect to +, close to L1.
C2 and C3 connect directly to emitter, without R2.
Change R3 from 200k to 100k.
Change R1 from 22 to 51 Ohm.
Your circuit has HF parasitic oscillations on top of sine,
so, use very short wires (better leads only) and solder joints.
Do not use solderless breadboard.
upload_2019-8-14_17-18-46.png
 

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Thread Starter

patpin

Joined Sep 15, 2012
401
Thank you for detailed answer.
For now:
Change C1 from 10n to 100n and connect to +, close to L1.
C2 and C3 connect directly to emitter, without R2.
Change R3 from 200k to 100k.
Change R1 from 22 to 51 Ohm.
Your circuit has HF parasitic oscillations on top of sine,
so, use very short wires (better leads only) and solder joints.
Do not use solderless breadboard.
View attachment 183873
Thanks for all info! I'll try to make it this evening. Would be very interesting to know how you come to all those conclusions!
 

Thread Starter

patpin

Joined Sep 15, 2012
401
Thank you for detailed answer.
For now:
Change C1 from 10n to 100n and connect to +, close to L1.
C2 and C3 connect directly to emitter, without R2.
Change R3 from 200k to 100k.
Change R1 from 22 to 51 Ohm.
Your circuit has HF parasitic oscillations on top of sine,
so, use very short wires (better leads only) and solder joints.
Do not use solderless breadboard.
View attachment 183873
The signal (Vpp) at OUT2 was a deformed sine (notch at top). I corrected it by putting 47K over C6. Thermostability is OK. Current over L3 only 1mA difference at -15°C than at 110°C.
EDIT: On sim my freq is 757Khz and in real circuit 925Khz. I have changed C1 to 1µF and C3 to 0.1µF and then I have 530 KhZ (on sim) and the sine is cut at bottom. After that I saw that increasing C2 a little bit is better...
 
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Danko

Joined Nov 22, 2017
1,823
The signal (Vpp) at OUT2 was a deformed sine (notch at top). I corrected it by putting 47K over C6. Thermostability is OK. Current over L3 only 1mA difference at -15°C than at 110°C.
EDIT: On sim my freq is 757Khz and in real circuit 925Khz. I have changed C1 to 1µF and C3 to 0.1µF and then I have 530 KhZ (on sim) and the sine is cut at bottom. After that I saw that increasing C2 a little bit is better...
600kHz and L2 current sine is close to ideal:
upload_2019-8-15_20-22-27.png

This is 472kHz oscillator:upload_2019-8-16_3-55-26.png
 

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