Afternoon all.
I'm working on designing a different form-factor Game Boy Advance as a hobby and I'm a loss on how to recreate the cart selection switch of the GBA using a single SPST switch and some FETs. In the GBA, there is a DPST actuation switch that tells whether a GBA game or original Game Boy/Game Boy Color is inserted:
These are the characteristics for the detection switch:
If a Game Boy Advance game is inserted:
If a Game Boy / Game Boy Color game is inserted:

I have created this circuit to try and replicate the characteristics of the original detection switch (I would have used the original detection switch but it is too large for my application):

I did simulate the 2N7002T NMOS part of the circuit in LTSpice and it is "working" where IN35 is low when 5V is applied to the gate and IN35 is 3.3V when the gate is pulled to 0V.
The other portion of the circuit is giving me issues. I'm not sure if I have the NMOS/PMOS set-up correctly or if I'm using the right FET specs. Should I take a different approach or am I on the right track? Any help would be appreciated! Thank you!
I'm working on designing a different form-factor Game Boy Advance as a hobby and I'm a loss on how to recreate the cart selection switch of the GBA using a single SPST switch and some FETs. In the GBA, there is a DPST actuation switch that tells whether a GBA game or original Game Boy/Game Boy Color is inserted:
These are the characteristics for the detection switch:
If a Game Boy Advance game is inserted:
- Switch is not actuated
- VDD35 is connected to VDD3 (sends 3.3V to the cartridge slot and link port)
- IN35 CPU pin is pulled low
If a Game Boy / Game Boy Color game is inserted:
- Switch is actuated
- VDD35 is connected to VDD5 (sends 5V to the cartridge slot and link port)
- 3.3V is sent to IN35 CPU pin

I have created this circuit to try and replicate the characteristics of the original detection switch (I would have used the original detection switch but it is too large for my application):

I did simulate the 2N7002T NMOS part of the circuit in LTSpice and it is "working" where IN35 is low when 5V is applied to the gate and IN35 is 3.3V when the gate is pulled to 0V.
The other portion of the circuit is giving me issues. I'm not sure if I have the NMOS/PMOS set-up correctly or if I'm using the right FET specs. Should I take a different approach or am I on the right track? Any help would be appreciated! Thank you!

