FPGA Verilog Project - Saving values for future processing

Thread Starter


Joined Dec 27, 2022
Hello everyone!

I'm currently working on a project where I have 2 seperate circuits. One with MSP430 that has an ultrasonic sensor that capture motions and the other one with an FPGA board Nexys A7 100T with a display that displays the exact time at which the motion was detected. Both circuit are communicating via Bluetooth with the help of 2 Pmod BLE modules.

My question is: How can I save those clock times when the motion was detected for future purpose? I mention that I also made a digital clock so the clock is not the problem. I want that after a whole day of motion detection, I can access those clock values stored somewhere and process them elsewhere. How can I do this?

Any answer or advice to my question is welcome! Thank you!


Joined Jul 23, 2017
The board has uSD slot. I did not look at the schematic but I think you can save data to uSD memory accessing from Microblaze system running a small Linux.
Isn't it possible ?