Hello,
I am trying to design an FPGA board that has 2 MIPI cameras on it with 4 data lanes each providing a 4k resolution and 60 FPS data stream to a computer. I am thinking of using a Lattice ECP5 for the FPGA board, but it seems as if its MIPI CSI-2 receiver can only do a max 900 Mbps data transfer per lane, while I need about 1.2 Gbps (assuming RAW8). I see that the Lattice's Crosslink can go up to 1.5 Gbps per lane, but this FPGA only got about 5k LUTs. The reason the size of Crosslink is a problem is that I want the FPGA to do some image processing before being sent as a live data stream to the computer.
I have seen e.g. the Embedded Vision Development Board that uses both a Crosslink and ECP5 separated on 2 different boards: 1 to receive the data stream from the cameras (Crosslink) and merges the 2 video streams, and the other for processing the video stream (ECP5). However, I am not sure what interface they are using between these two FPGAs (MIPI CSI-2 I believe?).
Thus, my question is... Is it possible to receive the camera video stream with the crosslink, and convert it to a form that can be sent to ECP5, such that 1.2 Gbps transfer per lane (4.8 Gbps per video stream) is possible from Crosslink to ECP5 instead of the 900 Mbps that is the limit on the ECP5's MIPI CSI-2 receiver?

 

Hello
check if this board meet your expectations:
Kria KV260 Vision AI Starter Kit
See this link:
https://www.xilinx.com/products/som/kria/kv260-vision-starter-kit.html

It's a novelty abd I don't know how it is with their availability.

Best Regards

 

Hello FlyingDutch,
I have looked at using Xilinx FPGA's and SOC's to make this system. However, these components are extremely expensive, where 1 IC can cost about $1000. Instead, I want to make the system using Lattice FPGA due to the low cost to make the system. From what I believe I understand so far, the Crosslink board can receive a higher data rate per lane on the MIPI CSI-2. The Crosslink board can then convert this input to a different interface. This new interface will then be connected to an ECP5, where the image processing happens before using e.g. USB3.0 (CYUSB3014) or Ethernet ( DP 83867R) to transfer about 5 Gbps to the computer.

 

Hello FlyingDutch,
I have looked at using Xilinx FPGA's and SOC's to make this system. However, these components are extremely expensive, where 1 IC can cost about $1000. Instead, I want to make the system using Lattice FPGA due to the low cost to make the system.

Hello @sijafae,

I understand your point of view, but This SoM module don't cost 1000$ - just 250$ (all SOM module). You need of course design PCB module for this SOM and needed peripherals.

See Xilinx product page:
https://www.xilinx.com/products/som/kria/k26c-commercial.html

BYW: Development kit SOM+motherboard cost about 230$ at many distributors.

Best Regards