$$R_{balance} = \frac{NV_{rate} - V_{bus}}{I_{maxleak}}$$

N is the number of capacitors in series
Vrate is the rated maximum voltage for any one capacitor
Vbus is the bus voltage (the expected voltage across the whole series of capacitors)
Imaxleak is the maximum leakage current
Rbalance is the value of the balance resister between any two capacitors

Source: https://va1der.ca/index.php/balance-resistors-for-series-capacitors/

Above equation is used for the calculation of balance resistor values used for capacitors in series with higher supply voltage than capacitor ratings.

How this formula is obtained or derived from V=IR standard formula?

 

Start with what you are trying to achieve and/or prevent.

You have N capacitors in series. Each is rated for Vrate voltage. The voltage applied across all of them as a whole is Vbus.

One of the capacitors has a leakage current of Imaxleak.

What is the problem that is going to happen?

How can this be prevented by putting a resistor in parallel with each capacitor?

What value does this resistor have to have in order to prevent the problem from happening?

The result you get depends on which assumptions you make. Do you want to design for worst case? Do you want to design for the expected case with some safety factor?

Consider the case when all of the capacitors have identical leakage currents. The balance resistors do nothing. So you are concerned with the case where they are not the same. Consider two extreme cases -- in the first, all of the capacitors except one has the maximum leakage current and the remaining one has zero leakage current. The other extreme is that one of the capacitors has maximum leakage current and all of the others have none. Which of these will result in a capacitor with the largest voltage?

 

Start with what you are trying to achieve and/or prevent.

You have N capacitors in series. Each is rated for Vrate voltage. The voltage applied across all of them as a whole is Vbus.

One of the capacitors has a leakage current of Imaxleak.

What is the problem that is going to happen?

How can this be prevented by putting a resistor in parallel with each capacitor?

What value does this resistor have to have in order to prevent the problem from happening?

The result you get depends on which assumptions you make. Do you want to design for worst case? Do you want to design for the expected case with some safety factor?

Consider the case when all of the capacitors have identical leakage currents. The balance resistors do nothing. So you are concerned with the case where they are not the same. Consider two extreme cases -- in the first, all of the capacitors except one has the maximum leakage current and the remaining one has zero leakage current. The other extreme is that one of the capacitors has maximum leakage current and all of the others have none. Which of these will result in a capacitor with the largest voltage?

Thank you for the answer. yes, I understand that much but how to derive the formula? I tried several ways including focusing on a single cap voltage but got stuck.

 

First, ask yourself whether their answer even makes sense.

What is the basic problem we are trying to prevent? Any of the capacitors exceeding their max rated voltage.

What would lead to this happening? Some of the capacitors leaking more than others. The ones that leak more will have their voltage drop and the ones that leak less will have their voltage rise. Worst case, without any balance resistors, is therefore when all but one of the capacitors exhibits the max leakage current and the remaining one doesn't have any. Under these conditions, the voltage across that capacitor will eventually rise to Vbus.

How do balance resistors address this? By providing a path for the leakage current from the other capacitors to flow around the capacitor that has less (or no) leakage current so that it's voltage can't build up beyond Vrate.

What is the absolute maximum value that a balance resistor can have and still have a chance of preventing this? When the resistor across the cap has just the leakage current flowing in it as the capacitor voltage reaches Vrate.

That means that Rbal_max = Vrate / Imaxleak

Notice that this limit is independent of the number of capacitors.

Is the claimed answer consistent with this limit? No. It says that the size of the resistor across each capacitor scales up as you put more capacitors in series. Does this make sense?


I therefore believe that the answer they provided is wrong.

I don't know if they simply made a mistake and left a critical factor out, or if they made a bad assumption about what the critical scenario is (since if you make a particular bad assumption, you do get their answer).

So, forget about what they came up with. What do YOU come up with?

 

First, ask yourself whether their answer even makes sense.

What is the basic problem we are trying to prevent? Any of the capacitors exceeding their max rated voltage.

What would lead to this happening? Some of the capacitors leaking more than others. The ones that leak more will have their voltage drop and the ones that leak less will have their voltage rise. Worst case, without any balance resistors, is therefore when all but one of the capacitors exhibits the max leakage current and the remaining one doesn't have any. Under these conditions, the voltage across that capacitor will eventually rise to Vbus.

How do balance resistors address this? By providing a path for the leakage current from the other capacitors to flow around the capacitor that has less (or no) leakage current so that it's voltage can't build up beyond Vrate.

What is the absolute maximum value that a balance resistor can have and still have a chance of preventing this? When the resistor across the cap has just the leakage current flowing in it as the capacitor voltage reaches Vrate.

That means that Rbal_max = Vrate / Imaxleak

Notice that this limit is independent of the number of capacitors.

Is the claimed answer consistent with this limit? No. It says that the size of the resistor across each capacitor scales up as you put more capacitors in series. Does this make sense?


I therefore believe that the answer they provided is wrong.

I don't know if they simply made a mistake and left a critical factor out, or if they made a bad assumption about what the critical scenario is (since if you make a particular bad assumption, you do get their answer).

So, forget about what they came up with. What do YOU come up with?

Rbalance is not scaled up just for N but the whole term "$${NV_{rate} - V_{bus}}$$" , which is the voltage headroom for the entire series. In your equation "Rbal_max = Vrate / Imaxleak" You are disregarding the current flow through the series and through the cap itself. I don't know how we can write it raw like that.

Regarding my progress, I am stuck at this point:

The formula for calculating balance resistor values for capacitors in series is derived from the basic principle of voltage division.

Assuming, if the circuit is DC and the Charging stage of Caps has passed, then the voltage across each capacitor is inversely proportional to its leakage resistance Rleak. Therefore, we can write:

$$V_i = \frac{R_{leak,i}}{\sum_{j=1}^N R_{leak,j}} V_{bus}$$

where Vi is the voltage across the ith capacitor, Rleak,i is its leakage resistance, and Vbus is the total bus voltage across the series of capacitors.

Now, if we add a balance resistor Rbalance between each capacitor, then the voltage across each capacitor becomes:

$$V_i = \frac{R_{leak,i} + R_{balance}}{\sum_{j=1}^N (R_{leak,j} + R_{balance})} V_{bus}$$

We want to choose Rbalance such that the voltage across each capacitor does not exceed its rated voltage Vrate. This means that we need to satisfy the following inequality for all i:

$$V_i \leq V_{rate}$$

After that,

$$ \frac{R_{leak,i} + R_{balance}}{\sum_{j=1}^N (R_{leak,j} + R_{balance})} V_{bus} \leq V_{rate}$$

Now what?I can remove the summation from Rbalance but not from Rleak,j . From there I do not know how to reduce it to the original equation.

 

Rbalance is not scaled up just for N but the whole term "$${NV_{rate} - V_{bus}}$$" , which is the voltage headroom for the entire series. In your equation "Rbal_max = Vrate / Imaxleak" You are disregarding the current flow through the series and through the cap itself.

I am disregarding it in that expression because, as stated, it is the limiting case in which there is no leakage current in that capacitor, and thus all of the leakage current must go through the resistor while not exceeding the voltage rating of the capacitor. Any larger value of resistor will result in the voltage across the cap increasing above Vrate.

The actual limit is actually less than that, because that limit assumed that the only current flowing was the leakage current. In reality, you have not only the leakage current in the caps, but also the current in the balance resistors even when the associated caps also have leakage current.

But if my descriptive argument against their equation isn't convincing, let's test it with some actual numbers.

Let's say that we have Vbus = 1000 V and want a total capacitance of 100 µF. We have a source for capacitors that are rated at 50 V and we choose to put 50 of them in series. This means that we need 5000 µF caps. Aluminum caps of this size typically have a DC leakage current of about 2 mA, so let's use 3 mA to play it safe.

The equation you cite would make the balance resistors each

Rbal = [(50·50 V) - 1000 V] / [3 mA] = 500 kΩ

Does this value make ANY sense at all?

How much current will flow in this resistor if NONE of the capacitors have ANY leakage? Simple -- each capacitor will have 20 V across it, meaning that the resistor will have about 40 µA flowing in it.

How is such a resistor possibly going to balance out the leakage currents of a couple milliamps? Answer -- it's not. Even when a capacitor is at the full 50 V rated voltage, the balance resistor would only support 0.1 mA of current, well over an order of magnitude too small.



So let's derive an equation based on a worst case scenario.

First, we will assume (for simplicity) that each of our caps fall into one of two categories -- either it has ZERO leakage current, or it has the maximum leakage current flowing in it and, in the latter case, that current is a constant independent of the actual voltage across the cap.

Now let's focus on one capacitor and it's associated balance resistor.

The total current flowing in the pair is

I_tot = I_leak + I_bal

The voltage across the cap is simply

V_cap = (I_bal · R_bal)

In our worst-case scenario, all of the caps except one have the max leakage current flowing in them while one of them has zero leakage current. We'll call the voltage across the leaky ones V_leak and we are interested in the situation in which the voltage across the non-leaky one is V_rate.

Since all of these cap/resistor pairs are in series, they have the same total current flowing through them, which means that

I_tot = V_rate / R_bal

The voltage across each of the leaky ones is then

V_leak = (I_tot - I_leak) · R_bal = (I_tot·R_bal) - (I_leak·R_bal) = V_rate - I_leak·R_bal

We also know that the total voltage across the string must equal V_bus

V_bus = (N-1)·V_leak + V_rate

V_bus = (N-1)·(V_rate - I_leak·R_bal) + V_rate

V_bus = N·V_rate - (N-1)·I_leak·R_bal

Solving for R_bal yields:

R_bal = [(N·V_rate) - V_bus] / [(N-1)·I_leak]



So let's use the same case as before. Our balance resistors are now each 10.2 kΩ (which we will assume we can find).

In theory, our non-leaky capacitor will be at, or very near, its rated voltage of 50 V, meaning that it would have a total of 4.9 mA flowing through its balance resistor (remember, this cap has no leakage current).

Our other capacitors will each have 3 mA of leakage current flowing in them, and thus 1.9 mA of current in the balance resistor making the capacitor voltage about 19.4 V. There's 49 of them, so they add up to 950.6 V of our 1000 V bus voltage, making the voltage across our leaky capacitor 49.4 V, as expected.

 

So, my next thought was whether the source of your equation just forgot to put the factor of (N-1) in the denominator, or whether they arrived at their equation based on some other starting point.

The only other obvious starting point was to assume the opposite extreme case in which all of the capacitors, except one, have no leakage and only one has leakage.

The same basic equations apply relating the capacitor voltage, leakage, and resistor value. The only difference is the sum of the voltages.

V_bus = V_leak + (N-1)·V_rate

V_bus = V_rate - I_leak·R_bal + (N-1)·V_rate

V_bus = N·V_rate - I_leak·R_bal

R_bal = [(N·V_rate) - V_bus] / [I_leak]

Which matches the equation you cited. I don't know that this is where it came from, but it seems quite possible.

But what does it mean? What does this whole scenario even mean?

If there is only one capacitor that is leaking, then it's voltage will diminish and the amount that it drops by will be equally spread across all of the other capacitors. So the more capacitors there are, the less the rise on any one capacitor.

In this scenario, even without any balance resistors at all, you are fine as long as the nominal voltage across any one capacitor, V_nom, evenly spread out across the remaining capacitors doesn't bring them above V_rate

V_nom = V_bus / N

V_rate = V_nom + [V_nom / (N+1)]

V_rate = V_nom · (N+2)/(N+1)

V_rate = (V_bus / N) · (N+2)/(N+1)

Since the (N+2)/(N+1) quickly approaches unity as N increases, in this scenario, no balance resistor is needed at all as long as the capacitor voltage rating is just a little bit above the nominal voltage across it. So getting balance resistors that are ridiculously large is not surprising in this scenario, but this scenario is not meaningful in addressing the issue.

Never assume that the information you find on a website is correct. A very large fraction of it is pure garbage, spouted by people that don't have a clue what they are talking about. A significant fraction of the rest has major errors because the people that wrote it only knew part of the story -- they might have done a good job as far as they went, but they are missing a key piece. Some of the rest has simple goofs and mistakes that didn't get caught in the proofreading. Even highly reputable sources make mistakes.

So it's always a good idea to sanity check what you find -- does it make sense in extreme limiting cases that allow you to apply significant simplifications. In this case, if we assume a very large value of N, then the value of V_bus eventually goes away and we are left with the absurd situation in which our balance resistor gets arbitrarily large as we add more capacitors. Doesn't pass the sanity test.

In the result that I came up with, as we make N arbitrarily large, the value of V_bus also goes away, but now the value of the balance resistor gets arbitrarily close to V_rate/I_leak, which is the limiting case that we would expect. So it does pass the sanity check.

 

Never assume that the information you find on a website is correct. A very large fraction of it is pure garbage, spouted by people that don't have a clue what they are talking about. A significant fraction of the rest has major errors because the people that wrote it only knew part of the story -- they might have done a good job as far as they went, but they are missing a key piece. Some of the rest have simple goofs and mistakes that didn't get caught in the proofreading. Even highly reputable sources make mistakes.

I think you are right. It looks like this formula is half-baked and the original poster of the formula may be only imagining some specific scenarios when suggesting this, like only a few capacitors in a series. Although I am yet to wrap my mind around Rbal_max = Vrate / Imaxleak . I think I have to read your posts in this thread from the beginning again. And I am going to do that hopefully in a few hours.

 

I think you are right. It looks like this formula is half-baked and the original poster of the formula may be only imagining some specific scenarios when suggesting this, like only a few capacitors in a series. Although I am yet to wrap my mind around Rbal_max = Vrate / Imaxleak . I think I have to read your posts in this thread from the beginning again. And I am going to do that hopefully in a few hours.

There's no difficult magic here, it's just a matter of making simplifying assumptions that allow you to place limits on the answer. The actual answer, once you get it, has to satisfy those limits. If it doesn't, then it's wrong (or you made a poor simplifying assumption -- a possibility that shouldn't be ignored out of hand).

In this case, we have a string of capacitors that have some leakage current in them. We have to allow for the fact that the total current is at least as large as the maximum leakage current. As soon as we put resistors in parallel with the capacitors, it will be even more, but we know that it is at least as large as the maximum leakage current. So that's our first simplifying assumption -- the total current is equal to the maximum leakage current.

Then, we have to allow for the possibility that one of our capacitors is going to have no leakage current. That's our second simplifying assumption. This means that the total current (which we are assuming is the max leakage current) has to bypass this capacitor and flow through a resistor placed in parallel with it and it has to do this when the voltage across it is no greater than the maximum voltage the capacitor is rated for.

Those three pieces of information yield that the largest value that the balance resistor can possibly be is

\(
R_{bal} \; \le \; \frac{V_{rate}}{I_{maxleak}} \; = \; R_{balmax}
\)

This is NOT claiming that this is the value of the resistor that WILL work, only a limit in that any resistor larger than that WILL NOT work.



Now, here's something that bothered me about my solution, which was:

\(
R_{bal} \; = \; \frac{N V_{rate} \; - \; V_{bus}}{\left( N-1 \right) I_{maxleak}}
\)

Notice that, as N get large, R_bal approaches R_balmax, which is fine, but it appears to approach it from the wrong side, since N/(N-1) is always greater than 1.

But R_balmax is a hard limit -- NO value greater than that should be acceptable, even if it is only slightly greater.

So, is there something that got overlooked? Did I make a math error in my derivation?

The answer is... No.

The key in resolving this quandary is to ask under what conditions is R_bal > R_balmax.

Answer that, and you realize that when those conditions are met, R_bal can truly be anything since balance resistors aren't needed at all (at least for the purpose of controlling the max capacitor voltage).

 

In this case, we have a string of capacitors that have some leakage current in them. We have to allow for the fact that the total current is at least as large as the maximum leakage current. As soon as we put resistors in parallel with the capacitors, it will be even more, but we know that it is at least as large as the maximum leakage current. So that's our first simplifying assumption -- the total current is equal to the maximum leakage current.

Then, we have to allow for the possibility that one of our capacitors is going to have no leakage current. That's our second simplifying assumption. This means that the total current (which we are assuming is the max leakage current) has to bypass this capacitor and flow through a resistor placed in parallel with it and it has to do this when the voltage across it is no greater than the maximum voltage the capacitor is rated for.

Those three pieces of information yield that the largest value that the balance resistor can possibly be is

\(
R_{bal} \; \le \; \frac{V_{rate}}{I_{maxleak}} \; = \; R_{balmax}
\)

This is NOT claiming that this is the value of the resistor that WILL work, only a limit in that any resistor larger than that WILL NOT work.

I have problems with these assumptions.

1. Max leakage through the whole series from cap 1 to cap n is dependent upon the leakage bottleneck at the cap with the lowest leakage current

2. this leakage bottleneck will be dependent upon the highest leakage resistance (if we can assume that leakage has a linear relationship with the voltage across the cap.

Now, here's something that bothered me about my solution, which was:

\(
R_{bal} \; = \; \frac{N V_{rate} \; - \; V_{bus}}{\left( N-1 \right) I_{maxleak}}
\)

Notice that, as N get large, R_bal approaches R_balmax, which is fine, but it appears to approach it from the wrong side, since N/(N-1) is always greater than 1.

When N increases \(R_{bal}\) approaches it's minimum value according to \(R_{bal} \; = \; \frac{N V_{rate} \; - \; V_{bus}}{\left( N-1 \right) I_{maxleak}}\) . You can clearly see this by applying N=1 and N=arbitralily large value. If N=1 \(R_{bal}\) approaches infinity (or rather dividing by zero is undefined) means whatever assumptions we made when composing the formula do not work for the single cap, which can mean we are making arbitrarily common sense assumptions and approximations when constructing the formula.

 

Leakage is but ONE aspect of the problem.
The other issue is the difference in capacitance- under surge conditions, the series string will charge to unequal voltages, the smallest capacitance in the stack will experience the highest voltage.
I ran into this problem once designing a supercap power backup circuit, far nastier than simple leakage.

 

Leakage is but ONE aspect of the problem.
The other issue is the difference in capacitance- under surge conditions, the series string will charge to unequal voltages, the smallest capacitance in the stack will experience the highest voltage.
I ran into this problem once designing a supercap power backup circuit, far nastier than simple leakage.

It is indeed a serious problem which is why we should choose sufficient voltage ratings necessary for the safe operation of the caps according to their capacitance tolerances which for good old electrolytics can range from 10%-40% depending on the manufacturer and voltage ratings. Yes, super caps can be particularly nasty because as individual super caps (Farad caps) usually come at a 2-3V rating we will need quite a few in series for use in AMP circuits. I would suggest buying modules with protection circuits built-in which is well worth the investment and time saving.

However, those two problems capacitance and leakage don't occur at the same time. The capacitance tolerance problem occurs at the initial charging phase with a large current flow. The leakage problem occurs at a later stage after charging currents subside and leakage resistance becomes significant enough to cause significant voltage differences between the caps. Now there is a transition period from one to the other but if we can solve both problems individually then I think the transition period is automatically taken care of.

 

I have problems with these assumptions.

1. Max leakage through the whole series from cap 1 to cap n is dependent upon the leakage bottleneck at the cap with the lowest leakage current

There are two problems with this claim. First, we are looking for the worst case situation. That worse case is when all capacitors except one have the max leakage current and one cap has zero leakage current. This results in the maximum increase in the voltage across one of the caps and it is that voltage that we are trying to put a limit on.

Second, the fact that the total leakage current (with no balance resistors at all) is limited to the cap with the lowest leakage current is the root of the problem we are trying to solve in the first place. It is the inability of the string of caps to support the leakage currents of all but the one with the lowest leakage current that results in all of the rest of them discharging and the voltage on the one with the lowest leakage current increasing.

2. this leakage bottleneck will be dependent upon the highest leakage resistance (if we can assume that leakage has a linear relationship with the voltage across the cap.

So? See the above.

When N increases \(R_{bal}\) approaches it's minimum value according to \(R_{bal} \; = \; \frac{N V_{rate} \; - \; V_{bus}}{\left( N-1 \right) I_{maxleak}}\) . You can clearly see this by applying N=1 and N=arbitralily large value. If N=1 \(R_{bal}\) approaches infinity (or rather dividing by zero is undefined) means whatever assumptions we made when composing the formula do not work for the single cap, which can mean we are making arbitrarily common sense assumptions and approximations when constructing the formula.

The case of N=1 is not covered by the formula because it was developed specifically for the situation of multiple capacitors in series. So the result it gives when we choose N=1 has no more meaning or relevance than when N=0 or N=-42.

As I said, the formula gives the appearance of having a problem because it would appear that it could result in values of R_bal that are greater than the absolute maximum value (R_balmax). But, if you examine it more closely, this is not actually the case. All you have to do is ask under what conditions R_bal can be greater than R_balmax and you will discover that it requires that V_rate be greater than V_bus. But, if that's the case, then there is no problem to begin with (at least as far as leakage causing the voltage on one of the caps to exceed its rated voltage) and you can eliminate the balance resistors altogether, which means you can also choose them to be arbitrarily large.

 

Leakage is but ONE aspect of the problem.
The other issue is the difference in capacitance- under surge conditions, the series string will charge to unequal voltages, the smallest capacitance in the stack will experience the highest voltage.
I ran into this problem once designing a supercap power backup circuit, far nastier than simple leakage.

Yes, there are other issues that need to be considered, but the problem that the TS is asking about in this thread is narrowly focused on where that equation for the balance resistors under DC steady state conditions comes from.