- Joined Nov 4, 2014
The question here is to determine what logical function is implemented in this circuit above, which uses nMOS and pMOS transistors as active high and active low switches, respectively. I made the truth table, and found that for negative logic (0 is true), the function is OUT = ACD + ABC + ABCD. For all other combinations, the value of OUT would read logic high or VDD since there is no current path to ground, and there is always a path to VDD. I'm not sure if this is right because I am still learning about transistors. Since the transistor is really a four terminal device, the gate input connects to ground inside the device, while drain and source connect when the switch is on, but are physically identical. This would mean that the only way for the OUT to see high logic level is to have a current path to VDD, since the gate inputs would not connect to OUT. Drain and source are the "ends" of the switch which get connected when the transistor is "on." Is that a correct description of the transistor? Do you think the logical function I found is right?