How can the voltage gain of each stage be found? (The differential input stage, the common emitter gain stage, the emitter follower output stage) The R18 is changed to 20kohms and C9 is changed to 500pF.

 

Q7, Q8 has current gain but no voltage gain. Gain=1 (output stage)

The closed loop gain is set by R17 and R18. (depends on frequency because C8 and C9 effects the gain) The gain is 30x set by resistors and that is spread out over Q3,4 and Q5,6.
Open loop gain is found by removing R18.

 

How can the voltage gain of each stage be found? (The differential input stage, the common emitter gain stage, the emitter follower output stage) The R18 is changed to 20kohms and C9 is changed to 500pF. View attachment 208554

The schematic does not appear to be complete or some things undefined.

 

I removed all the crossed wires and cropped the schematic.
EDIT: Maybe my C5 was wrong.

 

Maybe my C5 was wrong.

Might be 8.2pF. Some amplifiers are unstable without something small to slow them down.

 

Might be 8.2pF. Some amplifiers are unstable without something small to slow them down.
View attachment 208613

Yes, the internal unity gain frequency compensation.
Do a bandwidth simulation to check the capacitor value.