Hello Everyone
I'm having a problem with my external interrupt on RB0 which is not firing when I tested it physically but it works well when I simulate the project on PROTEUS 7.
Basically the PIC is connected to a 74C922 encoder with DA pin connected to RB0 to trigger the interrupt and read the key entered from a 4x4 keypad. I also implemented a heart bit on pin RB4 to check if the code is running smoothly in the loop which it does (tested and simulation), however for some reason I just can't understand why the interrupt is not firing when tested physically.
NB: I set a pull down 4k7 on RB0 and I read data on rising edge of interrupt signal, I'm using internal OSC at 4 MHz. Also I omitted on purpose other functionalities which are not really a concern.
Please find attached asm file and the code.
Thank you for your assistance!
Here is the code:
I'm having a problem with my external interrupt on RB0 which is not firing when I tested it physically but it works well when I simulate the project on PROTEUS 7.
Basically the PIC is connected to a 74C922 encoder with DA pin connected to RB0 to trigger the interrupt and read the key entered from a 4x4 keypad. I also implemented a heart bit on pin RB4 to check if the code is running smoothly in the loop which it does (tested and simulation), however for some reason I just can't understand why the interrupt is not firing when tested physically.
NB: I set a pull down 4k7 on RB0 and I read data on rising edge of interrupt signal, I'm using internal OSC at 4 MHz. Also I omitted on purpose other functionalities which are not really a concern.
Please find attached asm file and the code.
Thank you for your assistance!
Here is the code:
Code:
; TODO INSERT CONFIG CODE HERE USING CONFIG BITS GENERATOR
; PIC16F627A Configuration Bit Settings
; Assembly source line config statements
#include "p16f627a.inc"
; CONFIG
; __config 0xFF18
__CONFIG _FOSC_INTOSCIO & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _BOREN_OFF & _LVP_OFF & _CPD_OFF & _CP_OFF
; TODO ADD INTERRUPTS HERE IF USED
INT_VECT CODE 0x0004
bcf 06h,4
movf 05h,0
movwf 20h
call mask
btfsc 21h,0; test for programming mode
call counter
btfss 21h,0; test for programming mode
call t_start; test for * key
bcf 0Bh,1; INTF cleared
RETFIE
RES_VECT CODE 0x0000 ; processor reset vector
goto top
MAIN_PROG CODE ; let linker place main program
top movlw 07h
movwf 1fh
bcf 0Bh,1; INTF cleared
bsf 0Bh,7; GIE enabled
bsf 0Bh,4; INTE enabled
bsf 03h,5; Bank 1
bsf 06h,0; RB0 as input
bsf 01h,6; INTEDG enable rising signal
movlw .255
movwf 05h; RA0 to RA7 as input
bcf 06h,4;
bcf 06h,5; warning signal
bcf 06h,6; armed signal
bcf 06h,7; detection signal
bcf 03h,5; Bank 0
bcf 06h,7; PIR detection switch
clrf 20h; Data process reg
clrf 21h; Programming process reg
start bsf 06h,4
btfsc 05h,4; Test PIR1 signal
goto fire
btfsc 05h,6; Test PIR2 signal
goto fire
btfsc 05h,7; Test PIR3 signal
goto fire
goto start
fire
btfsc 21h,1; Test Alarm flag
goto warning
goto start
warning bsf 06h,5
bsf 21h,2; Emr exit bit
goto del_NoStck
run bcf 06h,5
btfsc 21h,1; Test Alarm flag
bsf 06h,7; PIR ON signal
goto start
mask movlw 0fh
andwf 20h,1
return
t_start movlw .12
subwf 20h,0
btfsc 03h,2; test Z bit
call prog
return
prog bsf 21h,0; Set for Programming mode
clrf 22h; reset the counter
return
counter incf 22h,1
call k1
call k2
call k3
call k4
return
k1 movlw .1
subwf 22h,0; test for count1
btfsc 03h,2; test for Z bit
call set_k1
return
set_k1 movf 20h,0
movwf 23h
return
k2 movlw .2
subwf 22h,0; test for count2
btfsc 03h,2; test for Z bit
call set_k2
return
set_k2 movf 20h,0
movwf 24h
return
k3 movlw .3
subwf 22h,0; test for count3
btfsc 03h,2; test for Z bit
call set_k3
return
set_k3 movf 20h,0
movwf 25h
return
k4 movlw .4
subwf 22h,0; test for count4
btfsc 03h,2; test for Z bit
call set_k4
return
set_k4 movf 20h,0
movwf 26h
call trig
return
trig bcf 21h,0; clear programming mode
call t_k1
btfss 03h,2
return
call t_k2
btfss 03h,2
return
call t_k3
btfss 03h,2
return
call t_k4
btfss 03h,2
return
call ok; Correct code arm/disarm device
movlw .2
xorwf 21h,1; Toogle bit 21h,1
return
ok call bipping
btfss 21h,1; Test for alarm flag
call trig_on
nop
btfsc 21h,1; Test for alarm flag
call trig_off
nop
return
trig_on call delay_10s
bsf 06h,6; Arm signal
return
trig_off bcf 21h,2; Emr bit exit del_Stck
bcf 06h,6; disarm signal
bcf 06h,7; PIR switch OFF
return
bipping bsf 06h,5
call delay_300ms
bcf 06h,5
call delay_300ms
bsf 06h,5
call delay_300ms
bcf 06h,5
call delay_300ms
bsf 06h,5
call delay_300ms
bcf 06h,5
call delay_300ms
clrf 36h
clrf 37h
clrf 38h
return
t_k1 movlw .0
subwf 23h,1
return
t_k2 movlw .1
subwf 24h,1
return
t_k3 movlw .2
subwf 25h,1
return
t_k4 movlw .3
subwf 26h,1
return
delay_10s movlw .210
movwf 27h
loop3 movlw .200
movwf 28h
loop2 movlw .78
movwf 29h
loop1 decfsz 29h,1
goto loop1
decfsz 28h,1
goto loop2
decfsz 27h,1
goto loop3
return
delay_300ms movlw .150;
movwf 30h;
loop6 movlw .200
movwf 31h
loop5 movlw .2
movwf 32h
loop4 decfsz 32h,1
goto loop4
decfsz 31h,1
goto loop5
decfsz 30h,1
goto loop6
return
delay_1s movlw .201
movwf 33h
loop9 movlw .27
movwf 34h
loop8 movlw .60
movwf 35h
loop7 decfsz 35h,1
goto loop7
decfsz 34h,1
goto loop8
decfsz 33h,1
goto loop9
return
del_NoStck movlw .210
movwf 36h
loop12 movlw .200
movwf 37h
loop11 movlw .78
movwf 38h
btfss 21h,2; False trigger Emr exit
goto run
loop10 decfsz 38h,1
goto loop10
decfsz 37h,1
goto loop11
decfsz 36h,1
goto loop12
goto run
END
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