Ethernet MAC TABLE Collision

Thread Starter

Meliksen

Joined Sep 21, 2022
8
In a project I'm working on an FPGA, I'm converting a 48-bit MAC address to 16-bit using the Hash algorithm. RAM size is 2^16 bits and I have 8 ETHERNET ports. I am using the resulting hash as ramin address port. Each ethernet port has multiple source addresses. The questions start here.
1) example: A packet with source address A was received from ethernet port 8. After passing the 48-bit A source mac address through the hash algorithm, the 16-bit X ram address is formed. When going to the B ram address, the 1st port information -> "10000000" is written.
A packet with source address B arrived from Ethernet port 1. After passing the 48-bit B source mac address through the hash algorithm, the 16-bit X ram address is formed. Going to B ram address, 1st port information -> "10000001" is written.
Currently, if a destination MAC address with the same X ram hash address comes in, it will be forwarded to both port 8 and port 1.
Is this operation correct or how can it be done with another operation?

2) Since there is no RAM reset process in FPGA, how can I periodically delete the MAC Table addresses I wrote to the RAM?
a.drawio.png
 

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michael8

Joined Jan 11, 2015
333
I'm not sure I understand your questions, but here's my rephrasing
(and guessing) of it:

a. On receiving a packet you hash the source 48-bit MAC address to a
16 bit hash value.

b. Using the 16 bit hash value as an address you do a lookup? store?
into a RAM.

I'm unclear on the size of the RAM. It takes a 16 bit address so it
has 2**16 locations (65536) but on a read/write how many data bits are
there in that RAM?

I'm also unclear as to what the data in the RAM means?

Since you only have 8 ports and that fits in 3 bits, possibly the
RAM is 2**16 locations x 3 bits each? Then the RAM could map
a 16 bit hash value to a port.

Oh, perhaps you are using an 8 bit wide RAM and each bit represents
a port?

> Currently, if a destination MAC address with the same X ram hash address
> comes in, it will be forwarded to both port 8 and port 1.

> Is this operation correct or how can it be done with another operation?

I think that ethernet switches assume that MAC addresses are unique.

So the same MAC address should not show up on more than one port (unless
someone moves the device in which case it's now on the new port once
the switch sees a pecket from it on the new port).

> 2) Since there is no RAM reset process in FPGA, how can I periodically
> delete the MAC Table addresses I wrote to the RAM?

I don't think you need to delete any. A specific ethernet MAC
should only be on one port at a time so just use the source
port where it was last seen.

The real problem I see is if you get two MAC address which have the
same 16 bit hash value -- this will cause the switch to act as if the
two MAC addresses are the same. The switch would keep updating that
hash address in RAM with the new source port for that hash value, This
would cause inbound packets to be routed to the port which last "claimed"
the duplicate MAC.
 

Thread Starter

Meliksen

Joined Sep 21, 2022
8
Oh, perhaps you are using an 8 bit wide RAM and each bit represents
a port?

> Currently, if a destination MAC address with the same X ram hash address
> comes in, it will be forwarded to both port 8 and port 1.

> Is this operation correct or how can it be done with another operation?

I think that ethernet switches assume that MAC addresses are unique.

So the same MAC address should not show up on more than one port (unless
someone moves the device in which case it's now on the new port once
the switch sees a pecket from it on the new port).
Yes, you got it right. This is the method I did, but how can it be done differently from this method? Is there a more professional solution? Thank you for your response?
 

Thread Starter

Meliksen

Joined Sep 21, 2022
8
> 2) Since there is no RAM reset process in FPGA, how can I periodically
> delete the MAC Table addresses I wrote to the RAM?

I don't think you need to delete any. A specific ethernet MAC
should only be on one port at a time so just use the source
port where it was last seen.
If the RAM is not reset, if I change the ports, the old ports will be saved in the RAM. Is there a way to reset the RAM?

The real problem I see is if you get two MAC address which have the
same 16 bit hash value -- this will cause the switch to act as if the
two MAC addresses are the same. The switch would keep updating that
hash address in RAM with the new source port for that hash value, This
would cause inbound packets to be routed to the port which last "claimed"
the duplicate MAC.
Do you have any better advice for this problem?
 

michael8

Joined Jan 11, 2015
333
There are lots of product and engineering tradeoffs. What does
your product have to do? What would be nice? How many resources
are left in the FPGA?

a. The RAM maps the hash value to the switch output port. You can
use your current scheme of a bit per port or you could encode
the port number which for 8 ports fits in 3 bits. There will
likely be more gate delays for the port number decode which
may or may not matter.

b. I don't understand your need for a RAM reset, storing/setting
all the bits at the hash location in RAM should wipe out
any previous value there. Even if you are using 1 bit for each
port, DO set all 8 bits (and the others to 0). No problem.

c. Duplicate MAC addresses. There are several possibilties:

1. Depending on product requirements, Perhaps, with a good choice
of hash function and only 8 ports, a hash collusion is low enought
probability that it can lived with. How bad is this?

2. Store the MAC address in the RAM along with the port and
do a full 48 bit compare before using the port. If the
MAC doesn't match send the packet to all ports or whatever
a switch is supposed to do...

This requires a MAC 48 bit + port (3 or 8 bits) RAM width.
So possibly 56 bit wide RAM.

3. Have the RAM hold 2 sets of MAC/port number for each
hash value. Compare all 48 bits of the MAC with both MACs in
the RAM in parallel and use the port from the on which matches.
Can be expanded to wider than 2 sets. Similar to how
processor cache works...

And requires a 112 bit wide RAM...
 

drjohsmith

Joined Dec 13, 2021
549
Do t use a hash in a switch for this very reason.
The traditional answer is a content addressable memory , but fpgas are not good at that.
 

Thread Starter

Meliksen

Joined Sep 21, 2022
8
There are lots of product and engineering tradeoffs. What does
your product have to do? What would be nice? How many resources
are left in the FPGA?

a. The RAM maps the hash value to the switch output port. You can
use your current scheme of a bit per port or you could encode
the port number which for 8 ports fits in 3 bits. There will
likely be more gate delays for the port number decode which
may or may not matter.

b. I don't understand your need for a RAM reset, storing/setting
all the bits at the hash location in RAM should wipe out
any previous value there. Even if you are using 1 bit for each
port, DO set all 8 bits (and the others to 0). No problem.

c. Duplicate MAC addresses. There are several possibilties:

1. Depending on product requirements, Perhaps, with a good choice
of hash function and only 8 ports, a hash collusion is low enought
probability that it can lived with. How bad is this?

2. Store the MAC address in the RAM along with the port and
do a full 48 bit compare before using the port. If the
MAC doesn't match send the packet to all ports or whatever
a switch is supposed to do...

This requires a MAC 48 bit + port (3 or 8 bits) RAM width.
So possibly 56 bit wide RAM.

3. Have the RAM hold 2 sets of MAC/port number for each
hash value. Compare all 48 bits of the MAC with both MACs in
the RAM in parallel and use the port from the on which matches.
Can be expanded to wider than 2 sets. Similar to how
processor cache works...

And requires a 112 bit wide RAM...
a-) 8 ports are expressed with 8 bits

b-) The reason for my rami reset request, for example;
1-) A mac address hashing result writes 1.port = 0000 0001 to X address.
2-) B mac address hashing result is writing 5.port = 0001 0001 rame to X address.
3-) When I change the location of the port, for example, when I replace the ethernet cable in the 1st state to the 4th port, A mac address will write the information of 4.port = 0001 1000 to the X address as a result of hashing. For this, I need to delete the port information that occurs in the 1st case.
At the same time, this situation is referred to as MAC Address Aging, and a reset is performed every 300 seconds, as stated on the site https://medium.com/@cbitss.sheetal0303/understanding-mac-learning-in-ccna-dc3d81a4979b. Any suggestions on how to do the reset?


C2-) The reason for converting the 48-bit mac address to 16 bits with the hash function is to take up less space on the ram.
 

michael8

Joined Jan 11, 2015
333
I'm not an FPGA person (never used or programed one), but I've read a bit about them. You should
keep in mind that ethernet switches use custom ICs not FPGAs or else they use FPGA designed
to be part or all of a ethernet switch.

As I mentioned above, a large part of a switch design is the engineering tradeoffs between function,
speed, and cost. You haven't disclosed:

a. what speed ethernet (10/100/1000/faster)?
b. what FPGA you are using (implying it's speed, RAM, and other features it might have)
c. if this is a design to learn about things or one to really build
d. Is this design for one switch or thousands?
d. the rest of your switch design including other engineering tradeoffs you have
already decided.

So all you will get here is general information.

Ignoring the 300 seconds reset for now, I don't understand:

1-) A mac address hashing result writes 1.port = 0000 0001 to X address.
2-) B mac address hashing result is writing 5.port = 0001 0001 rame to X address.


In 2, why does't B write all 8 bits so the result is 0001 0000? That's what I would expect
and what is really needed.

You might look at:
https://ww1.microchip.com/downloads/en/DeviceDoc/9303db.pdf
 

djsfantasi

Joined Apr 11, 2010
8,690
1-) A mac address hashing result writes 1.port = 0000 0001 to X address.
2-) B mac address hashing result is writing 5.port = 0001 0001 rame to X address.


In 2, why does't B write all 8 bits so the result is 0001 0000? That's what I would expect
and what is really needed.
Why would you expect 0001 0000?

The TS said he wrote 0001 0001… That’s what I’d expect. Was it a typo?
 

michael8

Joined Jan 11, 2015
333
Why would you expect 0001 0000?
The TS said he wrote 0001 0001… That’s what I’d expect. Was it a typo?


port 5 should just write all 8 bits with it's bit (5th bit) a 1 and the rest 0. It has no reason
to set any other bits so I'm guessing the 0000 0001 port 1 bit is somehow left over
from the other port setting it -- ie: it's likely each port doesn't write all 8 bits but just
sets it's "own" bit.
 
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