# Drift of high/low input signal threshold in CD4000-series digital ICs ?

#### Alec_t

Joined Sep 17, 2013
14,238
I'm aware that the signal input threshold of CMOS ICs in the CD4000 series is approximately half the supply voltage (ignoring Schmitt inputs), but varies from chip to chip due to manufacturing tolerances. That said, supposing for argument's sake the threshold of a given IC were exactly 50% at 25C, how much would it be expected to vary over a temp range of, say, -40C to +40C ? I can't find info on threshold drift with temperature in datasheets. Would it depend on the particular topology of the PMOS and NMOS devices within the IC ? Would drift of some PMOS devices parially cancel out drift of some NMOS devices ?

#### Alec_t

Joined Sep 17, 2013
14,238
Thanks for that. It allays my concerns over a circuit I was designing.

#### crutschow

Joined Mar 14, 2008
34,079
Thanks for that. It allays my concerns over a circuit I was designing.
Why the concern over drift it the logic threshold voltage?
Doesn't the input signal go from ground to the rail voltage?

#### Alec_t

Joined Sep 17, 2013
14,238
Why the concern over drift it the logic threshold voltage?
Because I want to use a simple logic gate (rather than a 'proper' comparator) in a minimal-cost timing circuit, to sense when a ramp voltage crosses the threshold.

#### crutschow

Joined Mar 14, 2008
34,079
Because I want to use a simple logic gate (rather than a 'proper' comparator) in a minimal-cost timing circuit, to sense when a ramp voltage crosses the threshold.
You do realize that, if the gate doesn't have a Schmidt-trigger input, it may oscillator as the ramp reaches the threshold voltage?