Do Spice Models for MOSFET include lead inductance?
In specific, the LTSpice VDMOS models?
If not, will the circuit behavior be different from what it acually is?
I read this IR application note, but not clear still.
www.irf.com/technical-info/appnotes/an-1194.pdf
In specific, the LTSpice VDMOS models?
If not, will the circuit behavior be different from what it acually is?
I read this IR application note, but not clear still.
www.irf.com/technical-info/appnotes/an-1194.pdf
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