How are clock signal divided (what does it mean and how is it done), and why/when would you do it, and when wouldn't you (generally speaking)?

 

How are clock signal divided (what does it mean and how is it done), and why/when would you do it, and when wouldn't you (generally speaking)?

What do you mean by "divided"?

If you mean to change from 8MHz to 1MHz, as an example, then you simply count 8 clock pulses and output 1 clock pulse for every 8 counted. That is, the clock signal is divided by 8.

 

How are clock signal divided (what does it mean and how is it done)

https://en.wikipedia.org/wiki/Frequency_divider

why/when would you do it, and when wouldn't you (generally speaking)?

You know when it needs to be done. For example, if you wanted to use 60Hz line frequency to make a clock, you'd divide the 60Hz to 1Hz.

 

another addition to my block list

 

Why, you might have one frequency & want a second frequency that is a multiple or sub multiple. Say that I have a poor time keeping crystal controlled clock with final drive of 50 HZ & want to run it on line frequency of 60 HZ The common denominator is 300 HZ, so multiply the 60 HZ by 5 & divide by 6 & you have your 50 HZ. This is about as far out in left field as is original question.

 

How are clock signal divided (what does it mean and how is it done), and why/when would you do it, and when wouldn't you (generally speaking)?

It's done with a JK-flipflop, every flipflop in series devides the clock once, so you get devided by 2, 4 ,8 ,16 and so on.
You can use it in a microcontroller for example if it runs on 20MHz but you only need a fraction of the speed and want to conserve power without putting into sleep. And you wouldn't when you do need the speed, I think that is obvious by now.