the input capacitance is stated as 38nF. The total gate charge however is stated as 1330nC. For a gate voltage swing of 19V (+15V/-4V) the charge for the capacitor Q = CV = 722nC.

My question is, where does the rest of this gate charge come from? I have been testing the switching rise and fall times of my driver with a 38nF load and have managed to get very good results, but I am unsure whether I will expect the same performance when connecting the actual module. The theoretical capacitor charge, which should encompass both CGD and CGS, is almost half that than would be expected in the data sheet for total gate charge.

This may also skew my results in regards to power dissipation - if the total gate charge is twice or so of these results then the power dissipation may also be double when connecting to the module.

It may be worth noting that the rise and fall times across this capacitor seem to agree well with the equation T= QT/Ipk where T is the rise time, QT is the total gate charge, and Ipk is the peak output current of the isolated gate driver. So I am slightly confused about it. Thanks!