Direct Sequence Spreader mode operation In communications

Thread Starter

JimmyCho

Joined Aug 1, 2020
93
Hi guys,
I transmit packets by cc1350 launchpad of Texas instrument with Long Mode Range , mode 1 or 2, lets assume I use legacy mode which it's mode 1
in the link here there's an explanation about protocols and encoding schemes of mode 1 and mode 2 : https://www.ti.com/lit/an/swra642/swra642.pdf
and Im sampling them (capturing the packet) by a dongle called RTL-SDR.
I've succeeded to see the my sampled packet (transmitted packet) as I've built demodulator also fec encoder.

what Im trying to understand is how bits after it outs from fec encoder and enter the Direct Sequence Spreader how will it be transmitted ?

For instance lets assume that the output data of my fec encoder is [0 0 1 0] so it will be fed through DSSS , lets assume in my case the value of my DSSS=8 , so what should be the output of DSSS? I understand it should be in terms of 11001100 , 00110011 according to DSSS table that attached in the link above under encoding scheme.
So if we fed DSSS with [ 0 0 1 0] the output of DSSS is 11001100110011000011001111001100 am I right? Im asking because Im getting confused in the notation that's mentioned under Direct Sequence Spreader table in the link attached above- it's written LSB first for every sequence and didn't understand it well.


Second question, about Mode 1- Legacy Long Range Packet Format it's shown in the link that the payload data size is :
N*8*2*DSSS symbols
So it's showing the total size of payload after stage of DSSS .. right? I mean , the size of payload N*8*2*DSSS is actually the payload data after it passes the stage of Direct Sequence Spreader , in other words the size of payloads in terms of DSSS ... right? thanks alot.
 
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Thread Starter

JimmyCho

Joined Aug 1, 2020
93
@Papabravo
I've promised that I will understand and done fec encoder and here we come I succeeded big thanks for you for helping me in the other thread!
ofcourse you helped me much and it would be appreciated if you could help me here in my issue , the big problem of fec encoder implementation solved successfully .

thanks alot!
 

DickCappels

Joined Aug 21, 2008
7,158
Your questions appear to be specific to the T.I. CC150 Launch Pad. If nobody who passes through here has knowledge of it AND the time and inclination to work on answering your problem then you will have to wait until such a person does come along.

Note: There are many people who here how would like to help you but they don't necessarily have a background with the specific product you are working with.

You may be more likely to find the help you need on a forum specific to your system. Have you checked to see whether Texas Instruments has a forum dealing with this assembly?
https://www.ti.com/sitesearch/docs/...earchTerm=forum#q=forum&t=everything&linkId=1

If not, it may help to word your request using more general terms or terms that are readily found vai internet search.
 

Thread Starter

JimmyCho

Joined Aug 1, 2020
93
Your questions appear to be specific to the T.I. CC150 Launch Pad. If nobody who passes through here has knowledge of it AND the time and inclination to work on answering your problem then you will have to wait until such a person does come along.

Note: There are many people who here how would like to help you but they don't necessarily have a background with the specific product you are working with.

You may be more likely to find the help you need on a forum specific to your system. Have you checked to see whether Texas Instruments has a forum dealing with this assembly?
https://www.ti.com/sitesearch/docs/...earchTerm=forum#q=forum&t=everything&linkId=1

If not, it may help to word your request using more general terms or terms that are readily found vai internet search.
Thanks for your reply, appreciate.
what's confusing me the terms that I show here in my attachment.
it's written in the notation that DSSS spreader is transmit data with LSB first for every sequence of DSSS table according to DSSS value that we transmit our packet/data.
So I didn't understand exactly what does it mean that DSSS spreader transmits data sequences with LSB first? for instance if DSSS=4 with input fed to DSSS spreader [0 1 1 0] what would be the output? the notation LSB first is confusing me much.

Yup I know it might be more general terms, still relevant for me.

Thanks.
 

Attachments

DickCappels

Joined Aug 21, 2008
7,158
I guess it depends on your representation. Normally in binary notation the a string of bits is drawn with the lest significant (LSB)on the right, just like when doing arithmetic with decimal number. With integers most significant digit (for example, the tens) is drawn on the left of the least significant digit (the ones).

for example binary 1000 = decimal 8 and, and when transmitted the bits are output in the following sequence 0,0,0,1 <-- And that is how they would be display on an oscilloscope screen -opposite of binary notation. The clarification '(right-most bit first)" does not add to clarity at least to me.

I am unsure of some meanings in your question "...for instance if DSSS=4..."

You must be working very close to the encoder/decoder to have to worry about the sequence. That's admirable.
 
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Thread Starter

JimmyCho

Joined Aug 1, 2020
93
I guess it depends on your representation. Normally in binary notation the a string of bits is drawn with the lest significant (LSB)on the right, just like when doing arithmetic with decimal number. With integers most significant digit (for example, the tens) is drawn on the left of the least significant digit (the ones).

for example binary 1000 = decimal 8 and, and when transmitted the bits are output in the following sequence 0,0,0,1 <-- And that is how they would be display on an oscilloscope screen -opposite of binary notation. The clarification '(right-most bit first)" does not add to clarity at least to me.

I am unsure of some meanings in your question "...for instance if DSSS=4..."

You must be working very close to the encoder/decoder to have to worry about the sequence. That's admirable.
I understand you thanks alot, I want to understand how DSSSS works because what Im going to do is to implicitly
to do one step back in order to reverse the bits without spreading (the output of the encoder)
So if I understand you right, if I have pattern [ 0 1 0 1] fed to DSSS spreader with DSSS=4 (the value of DSSS is 4 and accordingly to the table the output should be in terms of 1100 or 0011 ) , as a result in my case the output is:
[ 1 1 0 0 - 0 0 1 1 - 1 1 0 0 - 0 0 1 1 ] right? I put "-" just for understandings nothing else.
what Im confused because the notation that LSB first this means that if the input for DSSS spreader is 0 and DSSS=4 so the output is 0 0 1 1 and not 1 1 0 0 , it's correct that zero at DSSS=4 will map to 1 1 0 0 according to DSSS table but because the DSSS spreader transmit first LSB first then it will be 0 0 1 1 , no?

thanks alot for any clarifications sir!
 

DickCappels

Joined Aug 21, 2008
7,158
I would help you but I am not advanced is DSS, only knowing some of the general low level principles - in other words, only understanding why it works and how to do simple things with it.

Also, as you suspect, I am not following your discussion of reversing bits. There are many experienced engineers in this forum and with any luck at all one of them will be along with a better understanding of what you are trying to do and what your hardware is doing.
 
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