Hey, I was working on a couple of lab questions. I got stuck on this one, I've been trying to figure it out for the past 2 hours.

The '~' symbol represents negated, in other words NOT

Show how you would realize the logic function
Z = ~A~BC~D
using only 2-input NAND gates. Draw a circuit diagram to show your implementation.

Where I'm stuck is, I'm trying to figure out if I'm supposed to use laws to simplify this logic equation or just make a diagram out of it.


Here is my diagram of the question: http://imgur.com/8z3JaB5

I know this diagram is wrong but how am I supposed to only use 2 NAND gates when it is (AB) (CD) that means there is 3 gates

Thanks in advance, any help will be appreciated.

 

It will take more than three NANDs.

To do it directly to the equation, it takes Nine 2-input NANDs.

If you apply DeMorgan first and then implement it, it takes Six 2-input NANDs.

 

Will I be able to simplify it more after applying DeMorgan? Thanks

 

Will I be able to simplify it more after applying DeMorgan? Thanks

No, but implementing ~Z directly with NANDs reduces the number of 2-input NANDs required...

 

Alright thanks for you're help. I'll research some more because I'm still puzzled on what to do on this question

 

I think everything will become obvious when you can answer the following questions:

How do I make an INV using only 2-input NAND?

How do I make a 4-input AND using only 2-input NANDs?

How do I make a 4-input OR function using only 2-input NANDs?

 

Hey, I tried to rewrite the circuit.
http://imgur.com/Y5ZLLyw

I'm still not sure if it's correct, I tried this version too.

http://imgur.com/1e5RDEj


I'm still lost, can't understand how you got nine nAND gates and six nAND gates

 

I also tried to answer those questions you stated, I think I answered them, but the last question i might have answered wrong.

 

Hey, I tried to rewrite the circuit.
http://imgur.com/Y5ZLLyw

I'm still not sure if it's correct, I tried this version too.

http://imgur.com/1e5RDEj


I'm still lost, can't understand how you got nine nAND gates and six nAND gates

To tell if either circuit is correct, analyze it to determine the Boolean expression and/or the truth table and compare that to what it is supposed to be.

I don't see the six NAND-gate solution that MikeML is talking about. I'm seeing that it is also nine NAND gates. I wonder if Mike overlooked that three of the inputs still need to be inverted. Or maybe I'm just not seeing something obvious.

 

Ok, but does any of the links I printed come close to the solution? So I understand if I'm heading the correct way.

 

Ok, but does any of the links I printed come close to the solution? So I understand if I'm heading the correct way.

Let's try this again.

To tell if either circuit is correct, analyze it to determine the Boolean expression and/or the truth table and compare that to what it is supposed to be.

Do this and show your work and results and we can look at that.

You need to start developing the ability to validate your own work. Remember, in the "real world" people will hire and pay you to solve problems for them and if they could tell you if your solution was correct, they wouldn't have needed to hire and pay you in the first place.

 

Um ok.. that answers my question..