Hi all,

Have a few problems with my assignment.

Circuit is as follows:

Ive derived a truth table and come up with this :

Can someone verify if the above is correct?

Ive then got these 2 logic expressions :

Y = A'D' + C'D' + B'D'
Z = D+ B

What I want to know is (if the above is correct) Is it possible to implement the above circuit using fewer logic gates?

 

This is the correct circuit

 

If the complemented inputs are available, how many gates does your solution use? How many gates were used in the original circuit?

 

If the complemented inputs are available, how many gates does your solution use? How many gates were used in the original circuit?

The circuit provided uses 3 logic gates as shown above.

I think I need a minimum 3 gates so therefore it would not be possible to implement the circuit with a few number of gates

 

I think I need a minimum 3 gates

I count at least 5...

 

I count at least 5...

Can you explain?

I see an AND, NOR and OR

 

Can you explain?

I see an AND, NOR and OR

Y = A'D' + C'D' + B'D'
Z = D+ B

I was referring to your solution.

The Y expression is 4 gates, the Z expression is 1 gate; 4 + 1 = 5.

 

I was referring to your solution.

The Y expression is 4 gates, the Z expression is 1 gate; 4 + 1 = 5.

Could the Y be simplified to ABCD' ?

 

Part of the issue is what counts as one gate? Does a three input AND gate count as a single gate?

 

Part of the issue is what counts as one gate? Does a three input AND gate count as a single gate?

Yes it would.

 

Yes it would.

That's a shame because it is a poor metric, both in terms of real estate (number of transistors), and speed (propagation delay). But if it's the metric you have to work with, then it is what it is.

 

Could the Y be simplified to ABCD' ?

You tell us. ABCD' says that in order for Y to be HI, that A, B and C must be HI and D must be LO. Is that what you need for the Y signal?