Hi everybody. I was asked to design a digital input circuit with the following specifications
VILmax=0.99V VIHmin=2.31V
Sink/source current: 1mA
Input Filter: RC low-pass,
time constant= 1ms
Protection: withstands to +40V and -40V
I have been working on the specifications one by one but the final product has some issues. Below is the circuit I have for now. There is a simple passive RC with time constant = 1ms, the weird thing left to this is a poor model of a voltage protection mechanism composed of two zeners and one bidirectional TVS, breakdown voltages of which add up to +-40V. That part will be replaced with a proper TVS. The schmidt trigger I use here is set to have low and high tresholds of -+1V respectively for now as the Vref=0V for testing purposes. The tresholds and shifts implied by Vref when given a value other than 0, however, does not match with calculated values when. Fed with a PWL source model, the tresholds are perfectly fine so I this makes me think that the error stems from frequency characteristics of the filtered signal. To solve this problem I used several opamps with high slew rates and GBPs but the error was still there and kept increasing to significant levels with the source voltage increasing. What else can be done to achieve precise tresholds? Or is there an easy way to implement such a circuit using optos, BJTs and some other things maybe like window comparators(feel like it is hard to implement the memory behaviour of sch trigger with this one)?

 

Why would you use an opamp to make a digital input?

 

Why would you use an opamp to make a digital input?

I am sorry if I am misreading your question but to my best understanding the design aims at detecting the level of a digital input, and output whether it is considered to be high or low. So I thought using the opamp to create a comparator with hysteresis would be handy to set tresholds for these high and low levels. Can you clarify what is wrong with that structure and what other options can be implemented here?

 

I am sorry if I am misreading your question but to my best understanding the design aims at detecting the level of a digital input, and output whether it is considered to be high or low. So I thought using the opamp to create a comparator with hysteresis would be handy to set tresholds for these high and low levels. Can you clarify what is wrong with that structure and what other options can be implemented here?

An opamp has frequency compensation circuitry (a low-frequency open loop pole) that can interfere with the operation of a comparator. A comparator can have the same inputs as an opamp, use the same hysteresis mechanism, but provides and actual open-collector (drain) digital output stage. A pullup resistor to your logic supply voltage makes it compatible with any logic family.

I have a Schmitt Trigger example if that would be helpful to you.

 

https://www.random-science-tools.com/electronics/schmitt-trigger-calculator.htm

 

https://www.random-science-tools.com/electronics/schmitt-trigger-calculator.htm

well, thanks. this will help me calculate the tresholds and shifts more quickly. the one I used in my circuit was also a non-inverting type whose input is the filtered output from a passive RC with 1ms time constant.