To measure the on-state Drain-Source voltage of the FET, for input into a differential input analog to digital converter, I need a good way to protect the ADC from the large off-state voltage.

The only way I can think of doing this is with a physical switch that's timed to the gate of the FET, but I don't see that as very elegant. Any other suggestions?

 

You could use resistors in series with the converter input to limit the current and zener diodes across the converter input to limit the voltage.

 

That's a great idea. How do I size the resistors? I imagine if they're too large, they cut off current to amplifier input.

 

That's a great idea. How do I size the resistors? I imagine if they're too large, they cut off current to amplifier input.

It depends upon the input impedance of the amp. You want the resistors to be significantly smaller than that so the measured voltage is only slightly affected.

 

Ok. The other problem I see here is that when the switch is closed, the differential will be some small voltage, but the common mode voltage will still be up high close to the supply voltage. Won't this injure the input amplifier to the ADC? For example my ADC says the input pin can see at most -.3V to VDD+.3V.

 

Can you use the MOSFET drain as the common for the ADC?

 

Are you really planning to use an N-channel as a high side switch? I'm not saying you can't, but to get low on resistance, you will have to drive the gate to about 510V. Is that your plan?

 

Ron H: Indeed, that's the plan. It's a high-side switch.

Crutschow: your suggestion creates the opposite problem. If the Mosfet Drain is the common, then when the switch is open, one ADC input will be equal to that common voltage, and the other input will be 500V less, killing the ADC: http://datasheets.maxim-ic.com/en/ds/MAX11612-MAX11617.pdf

 

You could always power the A2D with a 5V supply connected to the +500V line so it only sees very small voltages when the FET is on (it still sees -495V when it is off).

 

Pulling the input to -495 will blow out the A2D input, which can only withstand -0.3V to +6V with respect to it's ground.

It seems like the only way to do this is with a voltage divider so that 0 to 500V is mapped down to 0 to ~4V. The main problem with this approach is that the resolution of the ADC will be very poor over the range of V_DS when the switch is on.

 

This may seem like a stupid question, but is there a reason you couldn't switch the low side of the load? Is it hard-wired to ground?

 

That's exactly correct; the load is tied to the supply return, and I don't have the ability to move it. "it's complicated"

This isn't so extraordinary though - for example in half bridges you often need a high side driver.

 

That's exactly correct; the load is tied to the supply return, and I don't have the ability to move it. "it's complicated"

This isn't so extraordinary though - for example in half bridges you often need a high side driver.

Yeah, I know. It's just a PITA.

 

D you have a MOSFET selected that will withstand Vds>500V, with low Rds(on) at Ids>50A?

 

Well, not one that can handle 50A, but if you use a few in parallel and use some serious heat sinking, yes. I can't claim they're very cheap, but power electronics often isn't it seems

 

Well, not one that can handle 50A, but if you use a few in parallel and use some serious heat sinking, yes. I can't claim they're very cheap, but power electronics often isn't it seems

I thought that might be your approach.

 

I'm still working on this.
What is your pulse frequency? What is the duty cycle?

 

frequency is very low; the switch isn't pwming. the switching transient itself is quite fast, about 20 us. I don't expect to capture the transient dynamics with the ADC - i am just looking for the on or off voltage.

 

What range of Vds(on) do you expect to see?

 

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Crutschow: your suggestion creates the opposite problem. If the Mosfet Drain is the common, then when the switch is open, one ADC input will be equal to that common voltage, and the other input will be 500V less, killing the ADC: http://datasheets.maxim-ic.com/en/ds/MAX11612-MAX11617.pdf

That's where you use the resistor and zener to clamp the voltage.

Edit: The advantage of using the drain as the common is that you don't have to measure a small voltage drop on top of a large common-mode voltage.