I am studying for an interview for FPGA engineer (first time position) and am trying to solve some problems/questions in preparation.
One question I encountered was implementing a D Flip Flop using a Mux.
I did it this way, but haven't seen any solution that resembles my own, so I wanted to ask if it is okay, and if I haven't missed anything.
D is basically the selector for the first Mux, and if clk is '1', then the result goes to Q. if clk is '0', Q stays at it's current state.
I wanted to also ask something else - how do you approach digital design questions? I am having a hard time with this. I barely know how to begin, and am trying to answer by trial and error. Is there some way to approach them logically?
Thank you!
One question I encountered was implementing a D Flip Flop using a Mux.
I did it this way, but haven't seen any solution that resembles my own, so I wanted to ask if it is okay, and if I haven't missed anything.
D is basically the selector for the first Mux, and if clk is '1', then the result goes to Q. if clk is '0', Q stays at it's current state.
I wanted to also ask something else - how do you approach digital design questions? I am having a hard time with this. I barely know how to begin, and am trying to answer by trial and error. Is there some way to approach them logically?
Thank you!