Detect an Acitve Low signal

Thread Starter


Joined Mar 21, 2017
I would advise not tying directly to a CMOS logic pin a large cap w/o limiting
discharge current thru internal protection diodes when supply collapses. This
can cause a die hot spot, even Si melting if current too high. Simply place a
series R at CMOS input to limit the discharge current. Some vendors spec injection
current, some not. In latter case a few mA should be ok.

Regards, Dana
Thanks hopefully a 1K should be fine i guess.


Joined Mar 10, 2018
Low speed work 1K fine, otherwise 100 ohms for parts with faster signal
path. Better way is figure 10% of period of signal for Tr and 10% for Tfall,
use that with max signal rate period to get 10% time, then figure using

t = 5 x R x C, solve for R.

An even more exact way is use exponential function and the spec threshold
for CMOS input.....


Use worst case thresholds, part tolerances, power supply levels to do calculations. Then check ist
value against desire to limit the current to the target value.

Regards, Dana.