HW objective: Before this assignment, we were to design an incrementer/decrementer circuit. One input (ud), decides if the circuit will increment or decrement the input value. The input X would be from 0 to 5.

Now we are to use 2x4 and/or 3x8 BCD decoders and 3-input NAND gates to implement the same incrementer/decrementer circuit as described above.

Steps I've taken: To design the first circuit, I created a truth table with inputs X2, X1, X0, and ud. When ud is 0, the circuit increments. When it is 1, it decrements. When the circuit decrements, 000 outputs 101. When it increments, 101 outputs 000. 110 and 111 outputs dont cares. Using this truth table, I created K-maps, and was able to design a successful circuit. The first image that I've uploaded is this circuit.

Now for this new assignment, where I am lost, I've decided to use four 2x4 decoders. 'ud' and my MSB, X2, is inputted into the first decoder. Each output is then connected from this decoder to the enablers of the other four decoders. X1 and X0 are inputted into all four of these decoders.

From here, I figured that if I could use OR gates, I could just OR all of the corresponding minterms to the appropriate output F0, F1, or F2. Because I am only able to use 3-input NAND gates, I decided to use the equivalent of an OR with NAND gates. The second image that I've attached to this post is what I have so far...

I've simulated my circuit on Cedar Logic, and it does not work.

Any help would be appreciated!

 

I'd like to delete this thread. Can anyone help me do this? I just figured the circuit out

 

Hello,

We do not delete threads.
Can you post your answer, so others can have a look?

Bertus

 

Sure thing. Here is an image of my circuit. Come to think about it, there's probably a way I could simplify this, as I am supposed to use as few decoders and 3input NAND gates as possible. If anyone could help me with that, that'd be awesome.

 

Hi Sean Kim

I Would Like to help you but unfortunately I do not understand the approach You do. I'm sorry.

For example, what do you mean by this: incrementer/decrementer.
You mean the arithmetic operations of addition, subtraction ?

The same goes for me in your paragraph: Steps I've taken.
You say this:
When ud is 0, the circuit increments.
When it is 1, it decrements.
I guess that increases or decreases the value of X2, X1, X0.
Ok I understand. But How much increased. . . or how much decrements ???

But you say:
When the circuit decrements, 000 outputs 101.
When it increments, 101 outputs 000.
110 and 111 outputs dont cares.
What do you mean by this ?

Probably no one answered because your approach is confusing.

I would like to know exactly what you want to do that circuit that are developing.

 

Sorry for the confusion. Here's the assignment:

You have been asked to design an incrementer / decrementer circuit. A control input (ud)
to your circuit decides whether to increment or decrement the input value. Your circuit should work
correctly for any input X (0 ≤ X ≤ 5). Available to you are chips with the following contents:
• a chip with 6 NOT gates
• a chip with 4 2-input AND gates
• a chip with 4 2-input NAND gates
• a chip with 4 2-input OR gates
• a chip with 4 2-input NOR gates
• a chip with 4 2-input XOR gates
• a chip with 4 2-input XNOR gates
• a chip with 3 3-input AND gates
• a chip with 3 3-input NAND gates
• a chip with 3 3-input OR gates
• a chip with 3 3-input NOR gates
• a chip with 2 4-input NAND gates
• a chip with 2 4-input NOR gates
• a chip with 1 8-input NAND gate

So whatever the input is (from 0 to 5), it will either increment or decrement the input by 1. So if the input is 001, it would decrement and output 000 if 'ud' is 1. If 'ud' is 0, 001 increments by 1 and outputs 010.

Because the circuit works for any input X from 0 to 5, when it decrements 000, the output is 101. When it increments 101, it outputs 000.

 

Hi Sean Kim

So You can not use the 2x4 Decoder as appears in: INC DEC CIRCUIT.PDF Document. that you enclose in your post #4
Your design, in CEDAR, could be smaller if you see it from the point of view of a Adder/Subtractor instead of Incrementer Decrementer as you mention
It could be the same of course.
It has 3 input BITs: X0, X1 and X2.
And three output BITs: F0, F1 and F2.
Any binary number in X0, X1 and X2, will add or subtract a one (1) to them depending on the state of the button named ud.
Check out the document: BINARY ADDER-SUBTRACTOR.Pdf, attached to you.
Mainly from page 8 onwards.
On page 12 you can see the circuit for a full adder.
On page 27 you can see the adder subtractor 4 BITs. The M input corresponds to which You name ud.
Exactly, your design is just 3 BITs. So remove everything that is not required.
In the case of the circuit on page 27 They add or subtract the operand A and operand B.
In your case you only have the B operand because the operand A has fixed the binary number: 001.

Last words:
B0 is Yours X0.
B1 is Yours X1.
B2 is Yours X1.
M is Yours ud.
A0 must be connected to Vcc.
All other A’s should be connected to ground.
S0 is Yours F0.
and so on.

More ideas:
You can visit Google and ask him: adder subtractor circuit With CEDAR.

 

Thank you Mr. Carlos. You've been a big help!