Here is the question:

Using D Flip-Flop design a counter that counts the sequence 0, 3, 6, 10, 15, 0. You need to create the next state table, K-Maps, get functions, and draw the circuit, and draw the state diagram.

I haven't the slightest idea how to design a D Flip-Flop counter. All my googling tells me it's a reverse SR counter and I know that isn't right.

 

Get the data sheet for a 74LS161. That is a 4 bit binary counter. Check the internal logic arrangement.

Hint: You might look into a parallel load function.

Hint: How many states are there?