Designing a D Flip-Flop Counter

Discussion in 'Homework Help' started by Hammerhead, Dec 2, 2009.

  1. Hammerhead

    Thread Starter New Member

    Dec 2, 2009
    Here is the question:

    Using D Flip-Flop design a counter that counts the sequence 0, 3, 6, 10, 15, 0. You need to create the next state table, K-Maps, get functions, and draw the circuit, and draw the state diagram.

    I haven't the slightest idea how to design a D Flip-Flop counter. All my googling tells me it's a reverse SR counter and I know that isn't right.
  2. beenthere

    Retired Moderator

    Apr 20, 2004
    Get the data sheet for a 74LS161. That is a 4 bit binary counter. Check the internal logic arrangement.

    Hint: You might look into a parallel load function.

    Hint: How many states are there?
    Last edited: Dec 3, 2009