I am optimising a current sink circuit to be a bit more well behaved. In the typical circuit below you can see that it is a standard FET current sink that switches on and off by connecting the amp to the gate(The current is turned on and off quickly to drive an LED). What I am finding is that if I am using a a smaller range current say 0 to 1A, things are ok and my switching speeds vary between 400ns at low current to around 100ns at 1A. As the requested current goes up, the rise time goes down as there is more voltage over the sense resistor and more current through R4 to switch it faster. If I adjust the sense resistor to limit the current to 4A, the switching speeds increase to around 1.5us at low current due to the affect of R4. Up at 4A, the switching speeds are fine again. I can adjust the value of R4 down to speed things up and indeed I can get the switching speed at low current to around 300ns again. However, at higher currents the speed is now too fast and the fast switching and hookup wire parasitics are causing lots of spikes and resonance.
My question is, are there any simple modifications to the circuit below that can break the circuit's direct relationship between rise time and sink current. e.g. at 100mA current rise time 200ns, at 4A current rise time 200ns.
Any guidance from the experts on the forum would be gladly received.
My question is, are there any simple modifications to the circuit below that can break the circuit's direct relationship between rise time and sink current. e.g. at 100mA current rise time 200ns, at 4A current rise time 200ns.
Any guidance from the experts on the forum would be gladly received.