thank you, i will try that, one of my main doubt was where do i connect the output of the NAND gatehi p3,
Use the TC output pins for stop at Zero count, add a little logic to flip the JK state
E
thank you, i will try that, one of my main doubt was where do i connect the output of the NAND gatehi p3,
Use the TC output pins for stop at Zero count, add a little logic to flip the JK state
E
i used one that have Preset and Clear (sorry, i don't really know how to say that in a technic way).hi p3,
Did you use a JK Bistable to control the Clock into the 74192.?
E
hi,i used one that have Preset and Clear (sorry, i don't really know how to say that in a technic way).
it don't really need to start and 99 but while i was reading the datasheet i learned how to set the value in the display.hi p3,
Do you want the counter to be at 99 when the power is applied.?
If yes, consider the PL parallel load feature, do you know how to do that.?
E
i don't really understand why you use a 5 inputs NAND.hi p3,
Use the TC output pins for stop at Zero count, add a little logic to flip the JK state
E
i used 74ls76A.hi,
Which type of IC did you use.?
E
i think that i'm understanding, i already connect the button to the first clock and then i connect the Q of each JK to the next one, but i don't think that was the correct way, i don't know if i should connect the Q or the /Q to the next clock.hi,
OK,
Consider that you have just the one push button to Start /Stop, what if you used the button to Clock the 7476.
The Q and /Q outputs would change state on each push of the button.
Do you follow that OK.?
E
i tried to repeat this one but it didn't work very well, since it is connected direct to the 74ls47,i don't really need a big help, i just need to understand how i should wire up the clock to make it start/pausehi,
As this is Homework I have to limit the level of help I can give.
Just think about how you wire up just one of the Bistables in the IC. {we can discuss the the counter later]
Post a sketch on how you wire it up so that it Toggled its outputs on each push of the button.
E
and the output of the AND gate can be used in the TCp to make it start and pause ? also sorry i don't really get it, so the last Q should be connect in an AND gate with the clock ? so i will also wire up the button that is connect to the clock in an AND with the last Q ?hi,
Look at this.
You can see the Q output could be used with the Clock with an AND Gate.
E
now I understand, the clock input is for the push button and the input of the AND gate is to change the component that will define the frequency that will make the counter goes faster or lower, so i just need to connect 4 JK Flip Flop and the Q of the last one will go with the CLOCK, is what i said correct ? do you want me to build it in a protoboard to show you ?hi,
I am showing how the Clock input to the Counter can be switch On and Off.
Once we have done that part we can look at the next step.
E
oh nevermind, i only use 4 JK Flip Flop to make generate digits for the 74ls47 so i only need 1now I understand, the clock input is for the push button and the input of the AND gate is to change the component that will define the frequency that will make the counter goes faster or lower, so i just need to connect 4 JK Flip Flop and the Q of the last one will go with the CLOCK, is what i said correct ? do you want me to build it in a protoboard to show you ?
i tried to do this connect but it didn't work, what CLKO was supposed to be ?hi,
I am showing how the Clock input to the Counter can be switch On and Off.
Once we have done that part we can look at the next step.
E
there is course in my country that is called "Industrial eletronic" and i'm in the 3rd semester right now.Hi p3,
CLKO is Clock Out from the AND gate to the first 74192 counter IC CLK Input pin
CLKO is the Gated Clock [AND] , gated by the 7476 Q output pin.
So ,
if Q is Low, the CLKO output is disabled and so the 74192 will not be clocked.
if Q is High , the CLKO output is enabled and so the 74192 will be clocked.
Post a sketch of the circuit you have made [ that does not work] and we can check it.
Can you tell us which course you are studying and the year level.?
We can then post help that you can understand.
E
Hi p3,
CLKO is Clock Out from the AND gate to the first 74192 counter IC CLK Input pin
CLKO is the Gated Clock [AND] , gated by the 7476 Q output pin.
So ,
if Q is Low, the CLKO output is disabled and so the 74192 will not be clocked.
if Q is High , the CLKO output is enabled and so the 74192 will be clocked.
Post a sketch of the circuit you have made [ that does not work] and we can check it.
Can you tell us which course you are studying and the year level.?
We can then post help that you can understand.
E
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