# Asynchronous counter that counts from 0 to 13

#### ksa1234

Joined Apr 6, 2022
3
Hello everyone. I'm having troubles with my homework. This is the description:

The aim of the assignment is to design an asynchronous counter that counts from 0 to 13.
Design assumptions:
The counters should be asynchronous and implemented with flip-flops and logic circuit gates.
• The counters should be asynchronous, "ripple".
• The counters should have the number sequence 0-1-2-3-4-5-6-7-8-9-10-11-12-13-0-1-2-3 ...
• Implement one counter circuit with JK flip-flops.
• Implement one counter circuit with D flip-flops.
This is therefore one counter which is implemented with two types of flip-flops in two separate
circuits. Make one design of a counter circuit with JK flip-flops and another counter circuit with D-
flip flops. Use all the logic circuit gates to support the circuit that you think you need.
Proposed methodology
• Use flip-flops with reset (R) input (R = 0 reset flip-flop). See picture as example from Cedar Logic
• Design the circuits and show all the steps

I don't really know where to start and any suggestion is helpful

#### dl324

Joined Mar 30, 2015
16,673
Welcome to AAC!
The aim of the assignment is to design an asynchronous counter that counts from 0 to 13.
Were you taught a formal design process for asynchronous counters? I've only seen one and it was developed long after I was out of school.

In your case, the counter counts in sequence, so it's a straightforward design. Post what you've done so far so we can offer hints.

#### ksa1234

Joined Apr 6, 2022
3
Welcome to AAC!
Were you taught a formal design process for asynchronous counters? I've only seen one and it was developed long after I was out of school.

In your case, the counter counts in sequence, so it's a straightforward design. Post what you've done so far so we can offer hints.
No I wasn't taught a formal design process for asynchronous counters that's why I'm having troubles even starting. I haven't done anything so far. Should I start creating state tables and then state equations?

#### dl324

Joined Mar 30, 2015
16,673
No I wasn't taught a formal design process for asynchronous counters that's why I'm having troubles even starting. I haven't done anything so far. Should I start creating state tables and then state equations?
There's no widely taught formal design process for asynchronous counters.

You have been taught how to daisy chain flip flops to make up or down counters. Do that to make one that will count to 16 and add logic to have it reset to 0 at the appropriate count.

#### ksa1234

Joined Apr 6, 2022
3
There's no widely taught formal design process for asynchronous counters.

You have been taught how to daisy chain flip flops to make up or down counters. Do that to make one that will count to 16 and add logic to have it reset to 0 at the appropriate count.

Is this correct?
Kind regards,
Ilaria

#### MrChips

Joined Oct 2, 2009
30,464
Is this correct?
Kind regards,
Ilaria
Appears to be correct (except that you omitted the /CLR on the QA flip-flop.
(It is customary to label QA as the LSB.)

#### dl324

Joined Mar 30, 2015
16,673
Is this correct?
Other than the missing connection to reset on the MSB. Congrats. That's one of the cleanest schematics I've seen from a student.

There's a wealth of knowledge you can get from the TI TTL databook:

EDIT: corrected typo (Not instead of Note).
Note that TI, and most old timers, use A as the LSB. I'm disappointed that many schools aren't maintaining that tradition. That oversight will make it unnecessarily confusing for you to use standard parts:

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