Hello,

I am having trouble understanding how a MOSFET works, in particular the relationship between the gate, drain, and source voltages. I am using N-channel enhancement mode MOSFET conventions, as these seem to be the most common devices.

My understanding thus far is that source is the anode, drain is the cathode. The gate needs to be positive with respect to the source to turn the MOSFET on.

My confusion occurred when I was looking at an H-bridge circuit, and learned of the bootstrap capacitor. As I understand it, this capacitor exists to raise the voltage of the gate above V+ in order for the device to turn on. What I don't understand is why the source would be at such a high voltage, considering it is the anode. I would imagine that the source would be connected to ground via the low side MOSFET, and therefore at 0V, not at V+.

What am I misunderstanding?

 

If you used complimentary transistors it wouldn't be a problem. Since you aren't you need a voltage greater than the power supply voltage, which is inconvenient. It accomplishes this goal.

I had the same problem, I can't say I'm still comfortable with it, but I ask the same question in this thread...

High Side MOSFET Drivers

It might give you some insights.

 

Since your course requirements may require you to understand the MOSFET version, you might also need to try to understand normal MOSFET conduction. Maybe someone else will be able to find you something better than this? http://en.wikipedia.org/wiki/MOSFET

First of all, what are the anode and cathode you are referring to? If this is the body diode, remember that this needs to be biased off during normal FET conduction. In normal operation, the N-channel MOSFET has its drain positive with respect to its source.

In the case of an N MOSFET used as a high-side (positive) switch, the drain is returned to the positive supply. For an N-channel enhancement device, the gate does indeed need to be driven positively above the supply in order to obtain full conduction.

Note that in a totem-pole arrangement (BJT, FET or whatever) the high-side and low-side devices are NOT normally switched on together. This can result in a potentially dangerous condition called shoot-through, as the power supply is effectively short-circuited.

 

Thank you both for your replies.

Bill: I am now slowly working my way through your thread. Thanks for the reference.

Adjuster: Apologies for my ambiguous terminology. I was referring to the drain being a higher voltage than the source. When I said cathode, I meant the leg that went back to the positive supply rail; anode is the leg that goes to the negative supply.

I have attached a drawing with my current understanding of MOSFETs. The stuff in red is what I added.

The confusion I had was with why the top left MOSFET in the drawing wouldn't turn on.

Original image source:
http://www.electro-tech-online.com/...ws/26729-mosfet-h-bridge-design-comments.html

 

Thank you both for your replies.

Bill: I am now slowly working my way through your thread. Thanks for the reference.

Adjuster: Apologies for my ambiguous terminology. I was referring to the drain being a higher voltage than the source. When I said cathode, I meant the leg that went back to the positive supply rail; anode is the leg that goes to the negative supply.

I have attached a drawing with my current understanding of MOSFETs. The stuff in red is what I added.

The confusion I had was with why the top left MOSFET in the drawing wouldn't turn on.

Original image source:
http://www.electro-tech-online.com/...ws/26729-mosfet-h-bridge-design-comments.html

Assuming that it is a typical enhancement-mode device, the top MOSFET requires its gate to be driven above the positive supply when it is required to be on. If the gate is only driven up to the rail, the transistor will not be fully turned on and so is likely to drop more voltage. This will lead to greater losses and possible overheating.

 

So, if I understand correctly, the problem is not so much that the MOSFET won't turn on at all, it just won't turn on all the way.

Follow up question(s): Does the gate require a voltage above V+ anytime the drain on an N channel enhancement MOSFET is connected to V+? Does this mean that the ideal manner in which to use an N channel MOSFET is with the source connected to ground (i.e V+ -> load -> drain -> source -> ground, as opposed to V+ -> drain -> source -> load -> ground)?

 

So, if I understand correctly, the problem is not so much that the MOSFET won't turn on at all, it just won't turn on all the way.

Follow up question(s): Does the gate require a voltage above V+ anytime the drain on an N channel enhancement MOSFET is connected to V+? Does this mean that the ideal manner in which to use an N channel MOSFET is with the source connected to ound (i.e V+ -> load -> drain -> source -> ground, as to V+ opposed -> drain -> source -> load -> ground)?

Not quite. Whether the upper transistor would turn on at all with the gate just at V+ depends on the values of V+ and the FET gate threshold voltage.

Of course, the gate drive voltage above V+ is only required to drive an N MOSFET in that position hard on. You do not require the MOSFET on at all times, or you could just replace it with a wire.

The lower FETs are certainly easier to drive in this all-N arrangement, because they are working in common source.

 

I took a quick look at the Digikey MOSFET section. When displaying results, they have a column "Vgs(th) (Max) @ Id" and "Rds On (Max) @ Id, Vgs." The voltage in the second Rds column tends to be around 10V, and the Vgs column varies a lot, but is always lower than the Rds voltage. If V+ is at least Vsource + Vthreshold, then connecting the gate to V+ will make the transistor start to conduct. The transistor will not full be on until V+ exceeds Vsource by the voltage in the Rds column.

I went and did some additional reading, and it seems that older CMOS circuits ran on 5V, with 700mV threshold voltages. Modern devices have much lower threshold voltages, allowing lower supply voltages.
(http://en.wikipedia.org/wiki/CMOS#Power:_switching_and_leakage)

Am I on the right track here?

 

International Rectifier has several papers available that explain HEXFET operation - Power MOSFET Basics PDF

 

Low threshold "logic level" FETs allow more flexibility, but gate driver devices are available to cope with a wide range of devices.

If you need to develop a practical circuit, it may be more convenient for you to use a dedicated driver IC. A correctly chosen type of driver will supply the right levels to ensure that the MOSFETS switch consistently.

Obtaining suitable gate drives without using dedicated driver ICs is another matter entirely. I do not feel qualified to advise you about this, beyond saying that there are issues beyond the voltage levels required. In particular, relatively large peak currents are needed to achieve short switching times. There may be other people on this forum able to give you more detailed advice.

If you need more assistance, it would help to know if you are trying to design something new, or to analyze an existing circuit.

 

So, if I understand correctly, the problem is not so much that the MOSFET won't turn on at all, it just won't turn on all the way.

Follow up question(s): Does the gate require a voltage above V+ anytime the drain on an N channel enhancement MOSFET is connected to V+? Does this mean that the ideal manner in which to use an N channel MOSFET is with the source connected to ground (i.e V+ -> load -> drain -> source -> ground, as opposed to V+ -> drain -> source -> load -> ground)?

big314mp - I'll try to answer, because I had the same problem as you in the beginning I'll put you questions in "quotes" and my answers after.

"So, if I understand correctly, the problem is not so much that the MOSFET won't turn on at all, it just won't turn on all the way." - It will turn on until the gate voltage and source voltage reach the threshold voltage, then it will shut off. During that time it will be in the resistive region of operation and make more heat in the mosfet.

"MOSFET is with the source connected to ground (i.e V+ -> load -> drain -> source -> ground," - When the source is connected to ground the gate only needs to be at the rated VGS(voltage gate to source) for full turn on. 10V for standard mosfet, 5V for logic level.

" as opposed to V+ -> drain -> source -> load -> ground" - When in this mode, the gate HAS to be higher than the source voltage by the VGS because the load is keeping the source at the drain voltage. The source is no longer(in this a 'high side' configuration) at ground level. Assume that Drain is 20V, the voltage on the Gate needs to rise to 30V. (10 VGS + 20V Source voltage) This is what a gate driver does.

Hope this helps and doesn't cause you more confusion.

 

Forget about the "threshold voltage" for a Mosfet. It is the gate-source voltage when the Mosfet is almost turned off.
You should use the gate-source voltage (usually 10V) used for the spec'd on-resistance when the Mosfet is fully turned on.

Logic Level Mosfets have an on-resistance spec'd when the gate-source voltage is only 4.5V or 5.0V.

 

Adjuster: This is all hypothetical; I was doing some reading on inverters and came across the "bootstrap capacitor" circuit in an H-bridge, which baffled me. I wanted to ensure that I understood how a MOSFET works. I will keep in mind the existence of driver ICs for switching high side MOSFETs, and if I use a MOSFET in a circuit I will try to avoid using high side MOSFETs in the first place.

beenthere: Thanks for the reference. It has now been downloaded and safely tucked away on my hard drive.

shortbus: This was what I was trying to find: "the gate HAS to be higher than the source voltage by the VGS because the load is keeping the source at the drain voltage."

I was having trouble figuring out how Vgs+source ended up above V+. I had been considering the MOSFET in the off state, and imagined the source connected to ground through the load. I imagined that the load would act as a pull down resistor to keep the source voltage low (not quite ground, but still fairly low). It makes more sense when looking at the MOSFET in the on state, as the drain will pull the source up to V+.

I think I get it now; thanks to everyone for your help!