Hi !
whenever the CPU generate an address in general it makes any address without any restriction on its bits values( 0/1) , if I have a direct mapping, then the CPU will read the address in parts ... tag | block's number(LINE)|block's offset , what's not making sense for is the tag part .. how do we have the same Line/block but with different tag? in other words what's actually the logical view thinking should I take whenever I deal with tags? may please any real life analogy emulate the tag manipulation? thanks alot.
all other parts of address are understandable for me, just the part of "tag" is still confusing me .. exactly how two address with same LINE/OFFSET but different just only in tag ..


Another question in context: what does it mean that my processor is one byte addressable ? does it mean that my processor at every transaction would hold one byte?

thanks alot

 

You can use many analogies for memory. This time, I’m going to use a parking garage and your car is the data.

Imagine that “tag” is the level within the garage. And each level is divided into sections, A,B,C, etc. This is your “line/block”. Can you see that you can have 3B and 4B with different cars?

That is the parallel to your question of having the same “line/block” with different tags. (While not asked, the spot number is your offset).

One byte addressable means that the processor accesses data one byte at a time. A one byte addressable processor has registers and buses that are one byte wide, ie 8 bits. Other processors are word addressable and possibly accesses data 16,32,64 bits at a time.