Computer Architecture, Cache Memory question about the address format

Thread Starter

JordanMakedonija

Joined Jan 26, 2020
2
A computer system has the following characteristics. The main memory has 1000 blocks. One block contains 8 words. Cache memory has 32 words. a)What is the format of the address?
b)A program passes 4 times through the locations 7 to 37 decimally. What is the hit rate? And how does the cache look after the 4 passings. The system uses direct mapping.
I know that there are 1000 * 8 = 2^10 * 2^3 = 15 bits for the address. Other than that I am stuck.
Thanks!
 

WBahn

Joined Mar 31, 2012
25,224
You need to show your best attempt to work the problem. You have a text or other material that explains how this works -- so make your best attempt based on that material. Doesn't matter if it is wrong, it will allow us to see where your reasoning is going off base.

With the little bit you've given, a couple questions come immediately to mind.

How is 1000 * 8 = 2^10 * 2^3?

How does this then equal 15 bits for the address?

Are you sure the problem states 1000 block for main memory and not 1024 blocks are 1 kblocks or something similar?

Is your memory byte-addressable or word-addressable? If byte-addressable, how many bytes per word?
 

Thread Starter

JordanMakedonija

Joined Jan 26, 2020
2
You need to show your best attempt to work the problem. You have a text or other material that explains how this works -- so make your best attempt based on that material. Doesn't matter if it is wrong, it will allow us to see where your reasoning is going off base.

With the little bit you've given, a couple questions come immediately to mind.

How is 1000 * 8 = 2^10 * 2^3?

How does this then equal 15 bits for the address?

Are you sure the problem states 1000 block for main memory and not 1024 blocks are 1 kblocks or something similar?

Is your memory byte-addressable or word-addressable? If byte-addressable, how many bytes per word?
Oh I am sorry, I meant to say 13 bits for the address. The memory is word addressable, and yea it is 1K blocks, so 1K is 2 to the power of 10, and if 1 block contains 8 words that means in total there are 8192, or 2 to the power of 13, so it leaves me with 13 bits for the memory address, cache has 32 words and if one block is 8 words, I estimated that in the cache there are total 4 blocks or 2^2 and 2 bits for the block index. Also, 8 words per block or 2^3, so that is 3 bits for the word index. And the memory format is 8bits for the tag, 2 bits for the block index, and 3 bits for the word index. That's my reasoning, by but I think I may be wrong.
 
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