Still learning VHDL... [ using GHDL V2.0, gtkwave V3.3 & UMHDL IDE V2.50b]
I have modified a VHDL example to include dead-time between complimentary outputs & it works well, except for a couple of issues.
1. The pwm_L outputs go hi after 'Reset_n' 0>1 (active lo reset)
2. After 'Reset_n' 0->1 'pwm_L(0)' output is active before pwm_h
I have done a lot of re-arranging, modifying & tests but can't clik_on why 'pwm_L' output is behaving different to 'pwm_H'.
If I swap '_L' & '_H' in the snippet code the issue(s) follow... [after a few weeks I might find it]
Desired state after reset (see smaller attached image)
All 'pwm_x(x)' outputs at 0 untill count condition is true (as it is with pwm_H )
The pwm_H hi pulse must precede pwm_L hi pulse, which is observed after the second reset in the attached simulation.
After the second reset release (175us) the order of phases is also correct - ph1 before ph2 .
--------------------------------
. Notes: The testbench is hard coded for some generic values in UUT.
To load the .gtkw simulation file, first edit the 'dumpfile' & 'savefile' path in the .gtkw & drag-drop onto gtkw, this will setup gtkw wave formats, then clik refresh button when build/sim from ghdl .
I have modified a VHDL example to include dead-time between complimentary outputs & it works well, except for a couple of issues.
1. The pwm_L outputs go hi after 'Reset_n' 0>1 (active lo reset)
2. After 'Reset_n' 0->1 'pwm_L(0)' output is active before pwm_h
I have done a lot of re-arranging, modifying & tests but can't clik_on why 'pwm_L' output is behaving different to 'pwm_H'.
If I swap '_L' & '_H' in the snippet code the issue(s) follow... [after a few weeks I might find it]
Desired state after reset (see smaller attached image)
All 'pwm_x(x)' outputs at 0 untill count condition is true (as it is with pwm_H )
The pwm_H hi pulse must precede pwm_L hi pulse, which is observed after the second reset in the attached simulation.
After the second reset release (175us) the order of phases is also correct - ph1 before ph2 .
--------------------------------
. Notes: The testbench is hard coded for some generic values in UUT.
To load the .gtkw simulation file, first edit the 'dumpfile' & 'savefile' path in the .gtkw & drag-drop onto gtkw, this will setup gtkw wave formats, then clik refresh button when build/sim from ghdl .
snippet - PWM outputs:
FOR i IN 0 to phases-1 LOOP
IF(Count(i) = Half_Duty(i)) THEN
pwm_H(i) <= '0';
ELSIF(Count(i) = period - Half_Duty(i)) THEN
pwm_H(i) <= '1';
END IF;
--Insert DT between complementary out.
IF(Count(i) = Half_Duty(i) + DT_cnt) THEN
pwm_L(i) <= '1';
ELSIF(Count(i) = period - DT_cnt - Half_Duty(i)) THEN
pwm_L(i) <= '0';
END IF;
END LOOP;
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