hello!

So I designed a very simple NOR Gate with mosfets. Dual network - 2 NMOS's in parallel and 2 PMOS's in series. To one input I applied a constant 5V and the other input is a 0-5[v], 1kHz square wave. Now since it's a NOR gate I would expect a constant 0V at its output but pspice produces in the output a square wave that is oscillating between ~25nv and 50nV. Is that a glitch or something? I really dont understand this result. when I did the same simulations on a CMOS NAND gate with one input with a constant 0V I got a constant 5V at the output., so why in the NOR gate it suddenly produces this miniscule square wave?

thnx!

 

hi S,
Please post your LTS asc file, I will run it.
E

 

hi, I'm using cadence orcad suit (capture for schematics) version 16.5 and not ltspice so i dont have an asc file format. i posted a picture of the circuit

 

I can't make out from the schem, is the 'out' line actually connected to M2 drain?

 

here that picture is, cropped and at 200 pct. It looks connected to me.

 

ohh sorry for that.. yeah the out is connectef to M2 and M4's drains

 

Try replacing the modelled generic FETs with real-world FET models.

 

hello!

So I designed a very simple NOR Gate with mosfets. Dual network - 2 NMOS's in parallel and 2 PMOS's in series. To one input I applied a constant 5V and the other input is a 0-5[v], 1kHz square wave. Now since it's a NOR gate I would expect a constant 0V at its output but pspice produces in the output a square wave that is oscillating between ~25nv and 50nV. Is that a glitch or something? I really dont understand this result. when I did the same simulations on a CMOS NAND gate with one input with a constant 0V I got a constant 5V at the output., so why in the NOR gate it suddenly produces this miniscule square wave?

thnx!

Miniscule is the right word for it. Remember that a FET is not a perfect switch, but rather (in a digital sense) either a very high resistance or a very low resistance. So in any of these configurations you have a voltage divider. Are you sure that in your NAND gate simulation you zoomed in enough to see such a small signal riding on 5V. You may also be seeing the limits of the representation. If your simulator is using 32-bit floating point numbers, then you have less than 8 sig figs available and 50nV on 5V requires at least 8 sig figs.

 

Real transistors will also have capacitance between the gate and the channel which will feed through a small amount of signal. No devices are perfect.

 

When I simulated the NAND gate I did zoom in as much as possible yet the output signal remained a constant 0V. It does looks like I should have get a miniscule square wave in the NAND gate simulation as well because, as some of you pointed out, the transistors feed through some of the input signal since they are not perfect switches.

WBahn - I think your idea about hitting the limits of the representation really hits the mark. I almost certain that this is the reason for not seeing a miniscule square wave in the NAND gate simulation.
Just to make sure I'm gonna check these results with our lab instructor to see what he has to say about this.

thank you all!!!

 

When I simulated the NAND gate I did zoom in as much as possible yet the output signal remained a constant 0V. It does looks like I should have get a miniscule square wave in the NAND gate simulation as well because, as some of you pointed out, the transistors feed through some of the input signal since they are not perfect switches.
........................

Now I'm confused. In your first post you said you got a small signal and didn't understand where it came from. Now you say there's no signal.

 

The sim works fine in LTspice, with no discernible oscillations on the output.

 

Now I'm confused. In your first post you said you got a small signal and didn't understand where it came from. Now you say there's no signal.

He saw a signal of 25nV to 50nV leaking through riding on a signal of 0V in the NOR sim, but saw no comparable small signal riding on top of a 5V signal in the case of the NAND.

For the NOR, the 25nV signal is the BIG signal and so will carry through the sim very easily. But when it is added to a 5V signal, it becomes tiny (beyond the epsilon limit of a variable of type float) and gets lost in the sim very easily.

How many sig figs are carried in the sim output? If it is anything less than eight, then such a small signal riding on a large signal will be lost.