Circuit for 2 coil latching relay

Thread Starter

carto

Joined Feb 3, 2014
45
I was thinking that powering the MOSFET all the time would take more power overall than would activating the the latching relay. I guess that's where the capacitor idea comes in--there would be no current flow through the MOSFET between wake-ups? I need the system to be as reliable as the relay approach, but am all for saving space and simplifying. I'll look into these suggestions; thanks!
Oops, I read this all again and I think I understand it better. The MOSFET is activated just at the start of the 2 minutes. Then the capacitor holds the voltage at the activated level while the processor turns off for most of the remainder of the 2 minutes. Then the processor wakes up, deactivates the MOSFET, and goes back to sleep for 90 minutes. Hopefully I have that part right. My question at this point would be, how much current leaks through the MOSFET when it's off during the 90 minutes (and this would also be for the entire first month)? Thanks
 

AlbertHall

Joined Jun 4, 2014
12,345
Below is the relevant section of the datasheet for the 2N7000. At 48V and 25°C it is just 1uA. The gate leakage during the time the capacitor is maintaining the gat voltage is -10nA but there is also the GPIO pin current to consider.
1589066192097.png
 

rlp123

Joined Apr 7, 2009
10
AL

The 2N7000 can only handle about 200mA. Also, with it's rds of 5ohms it would drop about 2V even if it could handle 400mA. Look for a low rds device and Id of 1A or greater. The Vishay IRLD120 (rds<0.38ohms Id 1.3A) is about 80cents at mouser.

Robert
 

rlp123

Joined Apr 7, 2009
10
An even better choice might be a power mosfet such as ON Semiconductor NTR4503N (47cents) at mouser. rds 0.1 ohms Id 2.5A and threshold voltage allows the device to remain on with a gate voltage down to 2.5V for a 400mA load. Of course actual testing would be prudent.
 

rlp123

Joined Apr 7, 2009
10
Here is one possible solution. Not sure if individual atmega I/O lines can go tristate on command but if so good power saver. Otherwise, I suppose I/O 1 & I/O 2 could be given the exact same pulses at the same time and polarity and go tristate between pulses. I picked BAT81 diodes for low Vf and lower leakage than many Schottkys. The 27uF cap on the gate will give a turnon time (driven through the I/O lines impedance) for the mosfet that isn't too drasticly slow (around 9mS) if the cap happens to be 20% high. Holding the gate voltage above the gate threshold for 2 minutes should be no problem with 22M and 27uF even when both are at their low tolerance. This is a theoretical circuit but I believe it may be useable.LoadControl.jpg
 

AlbertHall

Joined Jun 4, 2014
12,345
Yes, I had 119mA in my mind but I don't know where that came from. Post #14 makes the current 230mA.
So it will need something like IRL510 or IRL540 - gate leakage current 100nA, off state drain current 25uA.
There may be lower leakage MOSFETs available which would do the job but the above is pretty low.
 

rlp123

Joined Apr 7, 2009
10
Post 14 does make current around 230mA but in post 10 carto directly said 400mA. Things do not appear to click exactly... Even so, I still think the circuit I posted may be pretty darn simple and keeps software simple too since you can actually drive I/O1 & I/O2 high and low at the same time for the same pulse width using pullup/pulldown to keep required states between pulses during hi-z tristate. Pretty much leakage currents between pulses.

Robert
 

AlbertHall

Joined Jun 4, 2014
12,345
Post 14 does make current around 230mA but in post 10 carto directly said 400mA. Things do not appear to click exactly... Even so, I still think the circuit I posted may be pretty darn simple and keeps software simple too since you can actually drive I/O1 & I/O2 high and low at the same time for the same pulse width using pullup/pulldown to keep required states between pulses during hi-z tristate. Pretty much leakage currents between pulses.

Robert
Yes, I like that circuit.
 

Thread Starter

carto

Joined Feb 3, 2014
45
Hi again Al, Robert, and others--

I plan to get to the MOSFET solution next, but for now I have built a system around the TXS2-L2-4.5V relay. I have got the system to work on a proto board (board with soldering holes for wiring between components). At first, the result was not consistent--the ATMega328 would occasionally stop its procedure. It seemed that the relay action was causing this. I added capacitors between VCC and ground until I was up to about 1K uF; this stopped the stoppages

My problem now is that I have put all of this onto a PCB, and the DS3231 clock (which with its alarm interrupt is supposed to wake up the ATMega) loses its time with the relay action. As far as I know, the design of the PCB is the same as that of the proto board.

I have attached the schematic. Any ideas on how to solve the PCB problem? Thank you!

--Art
 

Attachments

AlbertHall

Joined Jun 4, 2014
12,345
Connect the VCC in directly to the relay coils, as it is now, but then feed the rest of the circuit, including the capacitor on VCC via a schottky diode to isolate the two supplies.
 

Thread Starter

carto

Joined Feb 3, 2014
45
Oops; I spoke too soon. What I did solved the problem temporarily (the relay-action results aren't consistent) for the pcb with the module DS3231 installed (and the chip trace cut) , but not for the PCB with the DS3231 surface-mount chip installed. (The same PCB design is used for both.)

Probably I just didn't interpret your suggestion correctly.

For the module-mount-clock version (with the jumper JP3 already disconnected) I cut the trace between the relay pin labeled "C1-9" and the clock-module VCC-in pin, and replaced it (soldered to the pins) with the diode I have on hand--the 1N4148FS-ND (not a schottky, but perhaps similar?). The bar-side of the diode is on the clock side. This worked OK until I plugged in the 12-V power, and then it worked inconsistently. The problem is that the alarm wake-ups are not consistent.

For the surface-mount-clock PCB (on another same-PCB), I ran the diode from the same relay pin over to the VCC side of the R3 resistor that leads to the VCC pin for the chip. This resulted in inconsistent relay action, made worse by plugging in the 12-V power. The surface-mount version works worse than the module-mount version--the wake-ups are inconsistent and the relay often clicks twice rather than just once.

The proto-board version (soldered with wires) has the clock module and just the D1 and D2 diodes, and it works OK. Perhaps something about the PCB exacerbates a problem still present in the proto-board version--I am pretty sure the designs are identical.

Perhaps the substitution for the schottky diode is the problem. I'll order some schottkys. But I bet I just didn't place them correctly.

Thanks for any help!

--Art
 
Last edited:

AlbertHall

Joined Jun 4, 2014
12,345
I don't think you put the diode where I meant.
VCC in should connect to the relay 12R+ and 1S+ and the diode anode. All the other VCC points connect to the diode cathode.
 

Thread Starter

carto

Joined Feb 3, 2014
45
Sorry, I am really a novice at this. Relay pins 12R+ and 1S+ are already connected to each other and to VCC, I think. So I would connect the diode anode there. Where would the cathode end connect? Thank you!
 

AlbertHall

Joined Jun 4, 2014
12,345
All the other VCC points in the circuit connect to the diode cathode so everything except the relay coils is fed via the diode.
If the relay coil pulse currents cause a brief drop in the VCC supply voltage the diode prevents this being passed to the rest of the circuit as the capacitor(s) on the rest of the circuit maintain the supply voltage to cover the period of the drop.
 
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