I am looking at the best way to implement a voltage divider.
The circuit reads the voltage of 12v LA battery. As I understand it, there will be accuracy loss with higher value resistors - at the same time
lower values will consume more power.
The circuit is read via atmega 328pb chip. The system will sleep a lot of the time and whilst sleeping the current draw is approx @4.2v :
0.3uA : 328pb - power down mode
250uA : Buck converter
1200uA : Sim800 - sleep mode
approx 1.5mA
So adding a 10k/2k divider will add a further 350uA to the system - with a resolution about .025v, which is fine as im only looking for 0.1v
What are the implications for say 100k/20k divider, will this pose accuracy issues with the analog reads?
The circuit reads the voltage of 12v LA battery. As I understand it, there will be accuracy loss with higher value resistors - at the same time
lower values will consume more power.
The circuit is read via atmega 328pb chip. The system will sleep a lot of the time and whilst sleeping the current draw is approx @4.2v :
0.3uA : 328pb - power down mode
250uA : Buck converter
1200uA : Sim800 - sleep mode
approx 1.5mA
So adding a 10k/2k divider will add a further 350uA to the system - with a resolution about .025v, which is fine as im only looking for 0.1v
What are the implications for say 100k/20k divider, will this pose accuracy issues with the analog reads?