I'm having difficulty with a combination "lock" with JK FF's, one of the attachments is the full write up.
I have the 555 timer in "one-shot" mode and have made sure I understand the JK FF operation, but I'm having difficulty with the JK flip flops triggering in sequential order. My code is 00 11 00 11, so I'm using two nor gates and two and gates from the input variables. I'm able to make the the output "Q" only when entering 00, trigger and reset it as would happen when the whole operation would happen. I tried making the Q' of the first gate go to "clear" of the second FF and having output of the AND going to the input of the second JK FF then the Q of the second FF go the K of the first but was unable to get it to properly work (and I figured I shouldn't reset the FF to see if the combination was correct at the end.) I have a 4-bit binary full adder, 4 to 1 MUX's, up-down binary counter, one transistor, resistors and standard gates in my lab kit. The other attached file is the pin out for the JK FF. Thank you

 

It sounds like you are trying to achieve a happening -- meaning they you are trying all-but random things hoping that something will just happen to work at some point.

Big word to the wise -- forget about throwing together asynchronous logic. Make a fully-synchronous machine. And DESIGN the machine to do what you want.

 

"I'd rename the thread "sequential jk triggering." I'm thinking I have to connect the output of the clock to a binary counter then to a multiplexer.

 

"I'd rename the thread "sequential jk triggering." I'm thinking I have to connect the output of the clock to a binary counter then to a multiplexer.

Why are you thinking that? Spend some time and DESIGN a circuit to do what you want it to do. The first step is being very clear on what you want it to do.

 

I would use two of the outputs of the binary counter as control inputs of the multiplexer, so when the clock triggered the counter it would process the multiplexer data inputs sequentially in the order i provided. I realized the multiplexer is simply selecting the inputs of the data rather than actually triggering anything tho :\\
EDIT: Using outputs of the gates as data inputs of the mux may work...

 

I would use two of the outputs of the binary counter as control inputs of the multiplexer, so when the clock triggered the counter it would process the multiplexer data inputs sequentially in the order i provided. I realized the multiplexer is simply selecting the inputs of the data rather than actually triggering anything tho :\\
EDIT: Using outputs of the gates as data inputs of the mux may work...

Yes, it might. It might also be possible to give enough monkeys enough breadboards, jumper wires, components, and time and they may eventually connect a JK flipflop into a useful circuit. I am sure, however, that they will not be able to make a flipflop do something that flip flops don't do.

 

I would use two of the outputs of the binary counter as control inputs of the multiplexer, so when the clock triggered the counter it would process the multiplexer data inputs sequentially in the order i provided. I realized the multiplexer is simply selecting the inputs of the data rather than actually triggering anything tho :\\
EDIT: Using outputs of the gates as data inputs of the mux may work...

You are still in search of a happening.

Once again, the first step is being able to clearly convey what it is you want the circuit to do in terms of the inputs and the resulting outputs. Until you've done that, you are just making effectively random guesses hoping that something will "happen".

 

I'm having difficulty with a combination "lock" with JK FF's, one of the attachments is the full write up.
I have the 555 timer in "one-shot" mode and have made sure I understand the JK FF operation, but I'm having difficulty with the JK flip flops triggering in sequential order. My code is 00 11 00 11, so I'm using two nor gates and two and gates from the input variables. I'm able to make the the output "Q" only when entering 00, trigger and reset it as would happen when the whole operation would happen. I tried making the Q' of the first gate go to "clear" of the second FF and having output of the AND going to the input of the second JK FF then the Q of the second FF go the K of the first but was unable to get it to properly work (and I figured I shouldn't reset the FF to see if the combination was correct at the end.) I have a 4-bit binary full adder, 4 to 1 MUX's, up-down binary counter, one transistor, resistors and standard gates in my lab kit. The other attached file is the pin out for the JK FF. Thank you

Here is an idea. A decoder gives low outputs on binary combinations of the switches. If the first set is 0,0 the first latch sets. If that latch is set and the next set is 11 the second latch sets, and so on.

 

Here is an idea. A decoder gives low outputs on binary combinations of the switches. If the first set is 0,0 the first latch sets. If that latch is set and the next set is 11 the second latch sets, and so on.

Did you not notice that the name of this forum is Homework Help and not Homework Done For You?

 

Did you not notice that the name of this forum is Homework Help and not Homework Done For You?

And how do engineers on the job get their designs? They start with a rough draft from a data sheet. Same thing.