@ homebrew, as you can see, it is not a simple task to design a "good working" amplifier stage, which can fulfill all the design goals at the same time - in most cases, you must live with a trade-off between several conflicting requirements:
* DC operating point stability
* Gain value
* Stability of the gain (vs. BJT parameter tolerances)
* Linearity properties (distortion)
* Frequency properties (bandwidth)
* Input impedance
* Power consumption (DC quiescent currents)

 

If you read through this, Common Emitter Amplifier, they pretty much cover the entire circuit in detail including the capacitor in question. Hopefully the link will help.

Ron

 

If you read through this, Common Emitter Amplifier, they pretty much cover the entire circuit in detail including the capacitor in question. Hopefully the link will help.

Ron

Thanks Ron

 

If you read through this, Common Emitter Amplifier, they pretty much cover the entire circuit in detail including the capacitor in question. Hopefully the link will help.

Ron

Thanks again Ron for that link....excellent stuff.

 

Glad you liked the link. I figured it addressed your entire circuit.

Ron

 

Glad you liked the link. I figured it addressed your entire circuit.

Ron

Yes and not only that but the site that the link takes me to is like the bible of electronics, it has tons of stuff on it....very useful.

 

Enjoy!

Ron

 

Thanks again Ron for that link....excellent stuff.

Did you also read the comments to this contribution? It contains several errors and false explanations.
I never would recommend this text.

 

Did you also read the comments to this contribution? It contains several errors and false explanations.
I never would recommend this text.

Now I am puzzled! which are you referencing?? I only looked at the first bit of the link and saw no pproblem in the firsr page. I did not go any farther, so I am puzzled about what has errors.

 

Now I am puzzled! which are you referencing?? I only looked at the first bit of the link and saw no pproblem in the firsr page. I did not go any farther, so I am puzzled about what has errors.

OK - here are a few things I have noticed:

(1) is not clear if the author describs the BJT as voltage- or current-controlled. He keeps changing his perspective

"This method of biasing the transistor greatly reduces the effects of varying Beta, (β) by holding the Base bias at a constant steady voltage level allowing for best stability."

"Thus a small change in the Base current will cause a large change in the Collector current flowing through the transistor."

"Then a single stage Common Emitter Amplifier is also an “Inverting Amplifier” as an increase in Base voltage causes a decrease in Vout and a decrease in Base voltage produces an increase in Vout."

(2) The example circuit has a bypass cap CE, therefore, the following is wrong:
"RIN is the total input resistance of the amplifier, calculated as: R1||R2||(β*Re)."

(3) The following is just a claim without justification. Most important:
He forgot the output resistance at the emitter node (pretty small) in parallel to RE:

"Generally, the value of the bypass capacitor, CE is chosen to provide a reactance of at most, 1/10th
the value of the Emitter Resistance RE at the lowest operating signal frequency."

(4) The following is completely wrong. The quantity re´ is not a resistance at all.
Some authors use this symbol,unfortunately, for the inverse transconductance (1/gm).

"However, the bipolar transistor has a small internal resistance built into its Emitter region called r’e. The transistor’s semiconductor material offers an internal resistance to the flow of current through it"

(5) It seems that he knows nothing about the temperature voltage Vt. Totally wrong!
"25mV being the internal volt drop across the Emitter junction layer"

(6) The following sentence again shows that the author has no knowledge about the physical working principle of the BJT:
"Thus only RL plus a very small internal resistance acts as its load increasing voltage gain to its maximum."

(7) In the drawing, the collector resistor is named „RL“ - nevertheless, sometimes (design formula for C2) he speaks about the sum (RC+RL).
More than that, the load line in the Ic=f(Vce) graph does not match the numerical values in the example.

 

Well then my apologies for the bad link. My bad.

Ron

 

Well then my apologies for the bad link. My bad.

Ron

It's a great link Ron, I have been reading other pages from that site and enjoying it.