Hello

So i am exploring the use of standard buck converter. I see from simulation that during startup, especially during the first few cycles i see very high voltage output before it settles into regulation. This seems failure obvious to me as you have not saturated your inductor yet.
However, with that being said.... If you have high output voltage for a little bit at startup how do you protect your downstream loads from that?

I would of thought about a series switch on the output but obviously unloading the buck converter just makes things worse.
So how is startup normally handled?

Also, with so much capacitance....how does one typically protect or deal with inrush?
I am looking at an open loop design right now and not a closed loop feedback design

Thanks

 

The common means of avoiding damage from short high voltage transients has been both shunt capacitance and series inductive reactance. The combination can be very effective. And because those high voltage pulses are narrow they do not contain a lot of energy, so catching them in a capacitor is practical.

 

The common means of avoiding damage from short high voltage transients has been both shunt capacitance and series inductive reactance. The combination can be very effective. And because those high voltage pulses are narrow they do not contain a lot of energy, so catching them in a capacitor is practical.

im Confused on what shunt capacitance is. You already have a capacitor on the output?

 

So how is startup normally handled?

Typically there is a slow start-up circuit to avoid overshoot in a closed-loop buck converter.
Open-loop converters are seldom used in a real application so the overshoot you observed is not a concern.

Below is the sim of a simple hysteretic-feedback type buck converter with such a slow (≈1ms) start-up.
The top plot shows the output start-up with the reference voltage (yellow trace) having a slow rise-time due to the R3-C3 time-constant.
Note that the output voltage (green trace) basically follows the reference voltage and rises to its regulated 5V value without overshoot.

The bottom plot show the start-up without C3.
Now the output overshoots to nearly 9V.

The red traces show the MOSFET gate control switching voltage (high voltage is off).

 

Hello

So i am exploring the use of standard buck converter. I see from simulation that during startup, especially during the first few cycles i see very high voltage output before it settles into regulation. This seems failure obvious to me as you have not saturated your inductor yet.
However, with that being said.... If you have high output voltage for a little bit at startup how do you protect your downstream loads from that?

I would of thought about a series switch on the output but obviously unloading the buck converter just makes things worse.
So how is startup normally handled?

Also, with so much capacitance....how does one typically protect or deal with inrush?
I am looking at an open loop design right now and not a closed loop feedback design

Thanks

There should not be a very high output voltage on startup. There will be a small percentage of "overshoot" but it should not be "vary high", otherwise, your right, it could potentially damage the load. The buck converter is probably not designed correctly.

 

Typically there is a slow start-up circuit to avoid overshoot in a closed-loop buck converter.
Open-loop converters are seldom used in a real application so the overshoot you observed is not a concern.

Below is the sim of a simple hysteretic-feedback type buck converter with such a slow (≈1ms) start-up.
The top plot shows the output start-up with the reference voltage (yellow trace) having a slow rise-time due to the R3-C3 time-constant.
Note that the output voltage (green trace) basically follows the reference voltage and rises to its regulated 5V value without overshoot.

The bottom plot show the start-up without C3.
Now the output overshoots to nearly 9V.

The red traces show the MOSFET gate control switching voltage (high voltage is off).

View attachment 320277
View attachment 320278

It's a bad idea to shunt the TL431 with a capacitor. Some capacitor values may cause oscillations.

 

As has already been stated again, it is important for the design of any converter design to go thru the startup stage without any over-voltage output events. Certainly startup is a separate condition from the running state, requiring additional effort.
The reality is that design of switching regulator circuits is not simple, nor even intuitive for most designers. Unfortunately some presentations ignore that problem.

 

It's a bad idea to shunt the TL431 with a capacitor. Some capacitor values may cause oscillations.

Duly noted.
A resistor between the TL431 cathode and the capacitor would likely minimize that possibility.

 

There should not be a very high output voltage on startup.

Did you not look at my simulation?
There certainly can be a significant overshoot if measures are not taken to avoid it.

The buck converter is probably not designed correctly.

He was looking at an open-loop circuit.

 

I can think of lots of ways to start it up especially if you start looking at closed loop designs. Or better yet add a uC
I just wanted to know what was typical.

 

I can think of lots of ways to start it up especially if you start looking at closed loop designs. Or better yet add a uC

It's a relatively simple thing to do.
Why would a µC be better?

 

Because it’s 2024 and things like the atiny85 exist which is cheaper then op amps and comparators and offers other benefits like software control

 

Because it’s 2024 and things like the atiny85 exist which is cheaper then op amps and comparators and offers other benefits like software control

I don't need the snark.
I'm well aware that it's 2024, but that doesn't mean you use a µC for every application just because it's cheap.
Unless you are using it to fully control all the signals to make a switching regulator, a dedicated switching regulator IC that includes all functions such as current-limit, loop compensation, soft-start, etc., is usually the best way to go.

 

I don't need the snark.
I'm well aware that it's 2024, but that doesn't mean you use a µC for every application just because it's cheap.
Unless you are using it to fully control all the signals to make a switching regulator, a dedicated switching regulator IC that includes all functions such as current-limit, loop compensation, soft-start, etc., is usually the best way to go.

Its not snark its meant to be literal. Not every application calls for an analog feedback loop. They take up cost and board space and there are certain industries where a uC is the best option because of availability and a dedicated IC is not a thing.

But riddle me this......

I am trying to find an equation that represents how the output voltage of a buck converter (open Loop) changes with the effects of different loads. Say like a resistor sweep.

On my simulation... i see the following.

The lower the load impedance the more current there is and im assuming you are running the inductor dry and into discontinuous mode (i think?) and the voltage regulation eventually falls to ~0V.

ok that makes sense....

But... i am looking for an equation that shows that.
I have taken the following equation that is intended to show minimum inductance requirements for certain parameters. Shown below.



Lets say i take that equation and i solve for my Lmin and i get some value.... ok great....
Plug it in the sim, it works fine.

I want to use that equation to assess Vout instead of Lmin

So since Lmin is now a fixed value i solved for previously, and if i rearrange the equation in terms of Vout i get this.



Now if i take this equation and hold Lmin fixed and start changing the output current as if i was simulating a load change from high impedance to very low i get a bizzare answer.

Vout behaves conversely to how the simulation works.

With a high current i get a high regulation voltage and with a low current i get a low regulation voltage which is is the opposite of the simulation behavior.

Why is this equation not holding?

If there an equation i can use to see the effects of current loading on my output voltage?

Thanks

 

Relative to the startup short term over voltage condition, one of the unfortunate realities related to closed loop systems is that the loop is not closed until the feedback system is stable. What that means for a switcher type power supply is that there must be, as the default start up condition, that the control portion needs to be fully awake and functional prior to the power portion being active, because otherwise, with nothing telling it when to reduce output, it will go to MAXIMUM. That is the intrinsic flaw of many feedback systems.
To avoid that problem the power section needs to default to the off state until the regulate system asks it to deliver power. That is always more difficult than the other way.

 

Not every application calls for an analog feedback loop. They take up cost and board space and there are certain industries where a uC is the best option because of availability and a dedicated IC is not a thing

But we are talking about a buck regulator here, not feedback loops in general, and there are many dedicated ICs for that.
Certainly there are many applications where a µC is the best option.
A buck regulator is not necessarily that application.

And telling me its 2024 is snark.

If there an equation i can use to see the effects of current loading on my output voltage?

There likely is, but that tells you nothing about the normal closed-loop operation of a buck converter where the duty-cycle is varied in response to load changes.

 

There likely is, but that tells you nothing about the normal closed-loop operation of a buck converter where the duty-cycle is varied in response to load changes.

I think the goal here is to learn the basic operation before trying to look at closed loop operation.
I wish to understand at a fundamental level how the change in load impedance screws up the output voltage regulation
Do you see anything fundamentally wrong with why my equation (which comes from a text book) would be giving me inverse results?

 

Did you not look at my simulation?

I don't need to.

There certainly can be a significant overshoot if measures are not taken to avoid it.

I implied that when I wrote my response, and if properly designed there should be minimal overshoot.