BJT in parallel. How to?

MisterBill2

Joined Jan 23, 2018
27,583
I suggested a higher powered RF transistor because they will provide the very high speed the TS demands. I think that Analog Devices also has a few really fast parts.
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
@MrSalts
price aside, I had already looked at the MRF but they have a high phase error also due to the high output capacitance which in this case is 250 and 420pF. This is why I had looked at a few GHz components that have much lower capacitances. As I wrote in post #15 .
 

MisterBill2

Joined Jan 23, 2018
27,583
Since the requirement seems to be very fast response to reduce phase delay, it might be useful to work with an applications engineer from one of the suitable semiconductor companies. Some FAEs are very well versed in what their company produces. And as we have not a speck of clue, other than it will drive a 50 ohm load, we have no clue as to possible work-around considerations. If perfect linearity is not mandatory then some of the logic families that work in the gigahertz realm may offer some value. (An idea offered based on very little information.)
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
218
@Niymas I think we have been advised against it because we need well balanced PNP and NPN pairs. The larger devices have higher capacitances and this affects the phase. From what I know there are obvious problems that anyone who designs something has. Then there are the Mosfets which could offer some more advantages but the problem of capacitance remains.
 

Ian0

Joined Aug 7, 2020
13,132
If I were to do this I would connect all the emitters and collectors together but connect each base lead with a separate bias resistor. Like below assuming npn type.
View attachment 255961
Doesn’t that have the opposite effect? The warmer one with the lowest Vbe would then take more base current, and make the current sharing worse rather than better.
Emitter resistors lower the base drive to the transistor taking the most current, and help to equalise the current.
 

MisterBill2

Joined Jan 23, 2018
27,583
An added emitter resistor for each transistor provides negative feedback to greatly reduce the effect of different gains. But it also does reduce the efficiency. The part about "low phase error with respect to the input" is confusing to me. Does the TS mean a response delay? Phase shift? Or ??? And the additional comments about input and output capacitance did not clarify it to me.
A more detailed explanation would educate those of us who are not familiar with the issue.
 

MisterBill2

Joined Jan 23, 2018
27,583
OK, in phase with each other will require using an emitter follower arrangement r else two stages, so now we need to know if you need voltage gain, or will current gain be usable? An emitter follower only provides current gain, the voltage gain is always less than unity.
So at this point we need to better understand the application to be able to offer anything better than guesses that may not be at all useful.
 
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