Ok, so be gentle... I'm just diving into this. It started with the need to document RS-232 properties in a DNC system. Having absolutely NO background with this, it obviously lead to a lot of research on the subject. So, I have a pretty strong understanding of the main points we're going to be defining:

Port: sets the comport to be used

Baud Rate: Is the modulation rate of data transmission as expressed in bits per second.

Parity: Parity is an error checking function that uses the addition of a Parity bit in the data packet to ensure the total sum of 1's for the selected number of Data Bits matches the value of the selected Parity. The receiving terminal can then verify the sum of the received 1's matches the expected Parity.

Data Bits: sets the amount of bits that exist in the data packet before Start, Stop, and Parity Bits are added.

Stop Bits: set the amount of Stop Bits output in the data packet.

Discard Null: removes spaces from the output.

Here's where my question comes in. I was reading this article that a user on this site pointed someone else to: https://www.lammertbies.nl/comm/info/RS-232_specs.html . It's very helpful, but it confuses me a little, because I was wondering if it's an actual bit, or just a pause in bits.... It says "The stop bit identifying the end of a data frame can have different lengths. Actually, it is not a real bit but a minimum period of time the line must be idle (mark state) at the end of each word. On PC's this period can have three lengths: the time equal to 1, 1.5 or 2 bits. 1.5 bits is only used with data words of 5 bits length and 2 only for longer words. A stop bit length of 1 bit is possible for all data word sizes." .... it also says: "The start bit has always space value, the stop bit always mark value. If the receiver detects a value other than mark when the stop bit should be present on the line, it knows that there is a synchronization failure. This causes a framing error condition in the receiving UART. The device then tries to resynchronize on new incoming bits."

I understand this to mean that:
Start bits always equal 0 (which is the Space state... Positive charge)
Stop bits always equal 1 (which is the Mark state... Negative charge)

So in a 4E2 data packet where we are transmitting "1010" we will end up with:
01010011 (0_1010_0_11 / Start_Data_Parity Bit_Stop Bits)

Question 1)
Is that correct? ... cause if it is, then Stop Bits ARE real bits right?

Question 2)
There are no pauses between this data right? ... only between data packets. So it wouldn't really read like:
zero one zero one zero zero one one ... but more like:
zero'one'zero'one'zeroooo'ooooone' ..... which would make more sense since I can set my stop bits to 1.5 as well. (can you tell that I over think things yet? lol)

I think these are my main questions right now. Any help would be very much appreciated.

 

Start and stop bits are really spacers to delimit the data stream.
1½ and 2 stop bits were used when processors were not fast enough to keep up with a continuous stream of incoming data. You can almost forget about these settings today. Focus on 1 stop bit henceforth
It used to be a general practice to transmit with 2 stop bits for the benefit slow listeners and be prepared to accept 1 stop bit.

Suppose your binary data is 01010011.

Firstly, you need to identify which is the MSB (most significant bit) and which is the LSB (least significant bit).
Generally, if we are reading from left to right, the first bit is the MSB and the last bit is the LSB.

When it comes to transmitting the data serially, we now have to choose which bit is transmitted first. On many modern systems today you get to choose, so long as the transmitter and the receiver agree to the same protocol.

Commonly, RS-232 transmission will send the LSB first. So now the analog data stream will be reversed,
i.e. 01010011 becomes 11001010.

Now we packet this 8-bit data stream with a 9th bit, the parity bit. For even parity, this bit will be 0
Hence
11001010 becomes
110010100

When this is transmitted by the serial hardware, the start bit (0) and stop bit (1) are added (spacers).
This becomes
01100101001

Emphasis added just to identify where the start and stop bits are added.

So the data steam really looks like (for a single byte being transmitted).
....11111011001010011111111....

where the original byte 01010011 is highlighted.

 

If this is a DNC as in Distributed Numeric Control, the other important factor is the hand shake, generally S/W (XON/XOFF) rather than hardware H.S.
As the receive buffer is generally small and the machine requires time to process the CNC data.
Max.

 

Right, so Start and Stop bits ARE actual bits, because it's not just a pause in data. They are a positive and negative pulses which are the same as 1's and 0's. So I think this may be answering my second question.... : What's with all the extra 1's at the beginning and end of your example?

Because I was wondering if, within a stream of data packets, are there any real pauses in the flow of negative and positive pulses? (1's and 0's)

 

The Stop Bit(s) are really just a holdover from mechanical teletype machines to give it time for the cams to reset after printing a character. Even the slowest XT processer serial card could handle no stop bits with proper programming (flow control). I've used lots of old 5 and 8 bit teletype machines in the past that needed them because the gearing would lock solid if they were missing.. Modern hardware uses the stop bit for framing error checking from lost synchronization.

https://en.wikipedia.org/wiki/Asynchronous_serial_communication#Origin

 

Right, so Start and Stop bits ARE actual bits, because it's not just a pause in data. They are a positive and negative pulses which are the same as 1's and 0's. So I think this may be answering my second question.... : What's with all the extra 1's at the beginning and end of your example?

Because I was wondering if, within a stream of data packets, are there any real pauses in the flow of negative and positive pulses? (1's and 0's)

I didn't have the time to draw an analog waveform.
The extra 1s are not really bits. They just mean that the voltage stays at logic high for an indefinite length of time.

I prefer to look at start and stop as spacers rather than as bits.

The start spacer is logic low for one bit period.
The stop spacer is logic high for one bit period.

 

If this is a DNC as in Distributed Numeric Control, the other important factor is the hand shake, generally S/W (XON/XOFF) rather than hardware H.S.
As the receive buffer is generally small and the machine requires time to process the CNC data.
Max.

Correct. It's RS-232 communication between a PC and a CNC Controller. Many of the customers we work with have controllers that are pretty outdated and usually have limited memory. Because of this, I'm assuming a lot of Controllers WOULD be set to 2 Stop Bits. But since I'm just working on MY understanding I wasn't too worried about MrChips suggestion to focus only on one Stop Bit.

 

I didn't have the time to draw an analog waveform.
The extra 1s are not really bits. They just mean that the voltage stays at logic high for an indefinite length of time.

I prefer to look at start and stop as spacers rather than as bits.

The start spacer is logic low for one bit period.
The stop spacer is logic high for one bit period.

Okay...okay... I can dig it!! So looking at your example, and putting that spin on it, we could read it as: ....Hiiiiiiigh'Low0110010100Hiiiiiiiiigh.... with the next "Logic Low" signaling the start of another data packet. So there is never going to be a time that there is a pause in the stream of Logic High and Logic Low bit periods, until a Xoff signal is received?

 

Okay...okay... I can dig it!! So looking at your example, and putting that spin on it, we could read it as: ....Hiiiiiiigh'Low0110010100Hiiiiiiiiigh.... with the next "Logic Low" signaling the start of another data packet. So there is never going to be a time that there is a pause in the stream of Logic High and Logic Low bit periods, until a Xoff signal is received?

Not quite, XON and XOFF are actually data bytes.
XON = 00010001
XOFF = 00010011

These will be sent from a receiver to the transmitter to say, "please hold off, I'm still busy digesting the last thing you sent me".
So this control character is sent from the receiver (via its TXD line) to the transmitter (via its RXD line).
This is a separate line from the transmitter TXD line to the receiver RXD line.
We are assuming full-duplex connection here.

There can be no interruption in the data stream, i.e. there are no spacers added within the data stream itself otherwise that would corrupt the data.

 

One useful tool is the port monitor, this is a small self powered box with indicator LED's that show the data action in both directions and the status level of the TX/RX port, i.e. pauses etc.
It also shows any Hardware H.S. if used.
Max.

 

Okay. Lastly:

The available "Flow Control" settings are:

UNSET
None
Xon/Xoff
Hardware

This threw me off, because in an older system I used, the options were None, Xon/Xoff, Hardware and Both. "None" I understand. Some systems don't even use the handshake. "Both" I guess I could see as a redundancy. So I'm assuming that "UNSET" is their version of "Both"..... Has anyone else seen that?

 

Most CNC systems I have come across use S/W H.S. BUT need to see the H.W. handshake in place, IOW you can usually use a 3 wire COM port cable but the H.S. has to be jumpered out.
A couple of examples.
Max.

 

some additional for your understanding:
1. Asynchronous communication means there is no clock transmitted,
receiver has to know the baudrate of transmitter and has to synchronize
for every frame (character or byte) via (the beginning of) startbit.
Following are a defined and constant nuber of data bits (7, 8 sometimes 9)
With ste startbit the frame is complete.
Possible modes are simplex (one transmitter to one receiver) or duplex
with communication in both direction indepent and possible at the same time.
2. HW handshake allows the receiver to delay the transmitting of next frame
with an extra signal line (CTS = clear to send and RTs = ready to send)
Duplex without HW handshake needs 3 lines (GND, TXD and RXD)
with HW handshake need 5 lines (CTS and RTS added).
SW handshake works in this way: if receiver is not able to get more frames it
transmitts a special character XOFF, transmitter waits until the charcter XON
is received and continues to send.
TXD from Port 1 goes to RXD on port 2 and vice versa, same with RTS and CTS.
3. Because no clock is transmitted and baudrate generateng has some tolerances
the transmitter has to wait a short time, minmum the stopbit before starting to
send the next frame with the startbit. If baudrates are relative exact on both sides
max +- 5%) one stopbit is good - in older days baudrate was generated by an
RC Oscillator or mechanically on Teletype so 2 bit times where needed.

 

Okay Gents!

"One" last question lol. So in the section where we're setting up RS-232 properties, we have the settings for:
Port:
Baud Rate:
Parity: ---- (And Parity Character next to that.... which I don't fully understand either)
Data Bits:
Discard Null (checkbox)
Flow Control: (This is the portion shown in the images attached)
The options in Flow Control are: UNSET (which I think may mean "both"... still waiting on clarification), None (I assume is self explanatory), Software, and Hardware (which currently causes a crash)

My confusion lies in the options you can see below....Since I've always have seen CTS with RTS and DSR with DTR it threw me off that I saw a mix of the two "CTS/DSR".. (Clear to Send / Data Set Ready) but I'm assuming it's a mix because you may have one or the other on the other side controlling flow... so I get that. But I'm not quite sure about why you would have to list X-On / X-Off characters if you've chosen "None" for your flow control, and I don't understand what the "CDC" option above "CTS/DSR" is.

If you guys can help, it would be much appreciated. (If you know what a Parity character would be used for too, that'd help also)

 

The H.W. H.S. lines are not really needed but have to be connected, for a 9 pin COM port it is 1-4-6 and 7-8 jumpered out each end.
If flow control is needed, S.W. H.S. is used XON/OFF.
Parity bit is set to 1 or 0 depending on the number of even or odd bits in a data word, it is a way of confirming that the data is correct.
Not quite as good as CRC (cyclic redundancy check) word.
Max.

 

Please look at the Fanuc Serial file which had been postet by MaxHeadRoom at #10.
There are wiring diagrams that show the local connection of CTS and RTS.
On our German Wikipedia there is a real good description of RS232.
Unfortunatly RS232 has 2 Device categories: DTE device (data terminal equipment) and
DCE data communication equipment; this determines also the gender of 25 pin conector
and the use of some pins. DCD means data carrier detection and is to see if the modem
on the other side is ON.
I am not familar with NC communication, but I worked a lot with RS232 and RS485 communication.
I cant see why you would use HW AND SW handshake at the same time.
If communication uses blocks (a defined nuber of characters) then there can be a block parity
character also called length parity. On punched tapes there are only 8 bits possible.

 

Okay...okay... I can dig it!! So looking at your example, and putting that spin on it, we could read it as: ....Hiiiiiiigh'Low0110010100Hiiiiiiiiigh.... with the next "Logic Low" signaling the start of another data packet. So there is never going to be a time that there is a pause in the stream of Logic High and Logic Low bit periods, until a Xoff signal is received?

I get the sense that you might be getting hung up on the false notion that there is something other than a Logic High and a Logic Low. There isn't. The receive is always seeing one or the other (if it isn't, then there are other problems). RS-232 does not require the transmission of data packets one after another. It might take, for instance, about 1 ms to transmit a packet but the transmitter might only be sending one packet every 10 ms. The state of the line between packets must be either a mark of a space -- there simply are not other options. The only way for the receiver to know that a new packet has started is to be able to detect the start bit (a space). But it can only detect the start bit if all of the bits before it (read as -- the state of the data line for all time since the end of the prior packet) are NOT start bits, which means they must be marks.

The author of the article that confused you so much is really just saying that after the completion of the last bit in a packet, the line must return to an idle (mark) state for a certain amount of time before the next packet can start. The number of stop bits defines that minimum idle time and, from a certain perspective, can therefore be viewed as not being bits, but merely a minimum idle time. You can choose to view it either way, both result in the same thing.

Once a packet starts it must proceed uninterrupted at the agreed upon baud rate -- there is no such thing as a pause within a packet.

 

The H.W. H.S. lines are not really needed but have to be connected, for a 9 pin COM port it is 1-4-6 and 7-8 jumpered out each end.
If flow control is needed, S.W. H.S. is used XON/OFF.
Parity bit is set to 1 or 0 depending on the number of even or odd bits in a data word, it is a way of confirming that the data is correct.
Not quite as good as CRC (cyclic redundancy check) word.
Max.

Okay, so I looked into the CRC (cyclic redundancy check)... that's a huge topic, but I get the idea. What I don't understand is: If I select a checkbox to activate CDC.. what is going to happen....

 

I don't know the system you are using the RS232 under, but parity bit is set by the local config and just applies on a word by word basis, IOW just applies to each word, whereas CRC is a completely different method that is configured in the software program and requires one or two words of a packet that totals the number of bits that has been sent in the whole packet of words, Modbus is one system of data transfer that uses it where generally 6 to 8 words are sent.
I did not really mean for you to look at it as an alternative, just meant to show it as a comparison.
Normally if you have a system capable of using it, it will calculate the CRC data to send, and this will be confirmed by the receiving end.
Max.

 

I don't know the system you are using the RS232 under, but parity bit is set by the local config and just applies on a word by word basis, IOW just applies to each word, whereas CRC is a completely different method that is configured in the software program and requires one or two words of a packet that totals the number of bits that has been sent in the whole packet of words, Modbus is one system of data transfer that uses it where generally 6 to 8 words are sent.
I did not really mean for you to look at it as an alternative, just meant to show it as a comparison.
Normally if you have a system capable of using it, it will calculate the CRC data to send, and this will be confirmed by the receiving end.
Max.

....wow..... I took a wrong turn there. When I saw you write out Cyclic Redundancy Check, I immediately confused CRC with the "CDC" option in the software: " " ......... So what do you think THAT option (CDC) might be?!?!?!