basic BJT analysis/Biasing question

Discussion in 'Homework Help' started by Cyberduke, Sep 5, 2017.

  1. Cyberduke

    Thread Starter Active Member

    Mar 5, 2011
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    Good Day

    I am having trouble with the following question. I have tried various things and I have no idea how to find the values. The main idea was for me to look at a loadline (like this http://users.cecs.anu.edu.au/~Matthew.James/engn2211-2002/notes/bjtimg36.gif) and divide the Vcc/RC and Vcc by 2 to find the centre of the load line. But this idea has so many holes.
    just doing basic circuit analysis ended me with too many variables aswell. There seem to be a piece of theory that I am missing, (I might even be wrong about that too)

    I assume that VA is 5V and VB is -5V. Oh and we can ignore vs Since we are doing large signal analysis right now.

    I would appreciate any help at this point.

    Thank you.

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  2. MrChips

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    Total supply voltage = VA - VB = 10V
    What is the max current Ic given the values for RE and RC?
    If you want the Q-point to be half-way on the load line, what would be the value of VCE and IC?
    If you know beta, what is IB?
    If you know VBE, VB, and IB, determine R1 and R2.
     
  3. Cyberduke

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    Mar 5, 2011
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    I have given this a long thought now and I think that the max for Ic would be the 10v divided by Re + Rc = 2mA. For the reason that if those resistors where 0 then we will have 10V over Vce(making this the max and then at half Q we have Vce=5V)?

    If we consider the total supply voltage to be 10V, this is regarded as VEE right?
     
  4. Cyberduke

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    Mar 5, 2011
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    And yeah as soon as I have Ic and Vce finding Ib is easy (IC = B IB=a IE).

    Then for R1 and R2, I found a Thevenin equivalent for the circuit into the base (VTH = 10(R2/(R1+R2))) and VTH = R1||R2.
    writing a base-emitter loop leaves me with too many varibles still(Rth and Vth, and I see no other eqution which will allow me to solve that, maybe a base collecter loop?). Am I missing something?
     
  5. MrChips

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    Have you selected your ICQ as yet, i.e. IC at the Q-point?
    If you know IC, then you can calculate, V across RE, RC and also VCE.
    There is no single value of R1 and R2 to give the correct base bias VB. This is why you cannot solve for R1 and R2 analytically, unless you add some additional constraints or compromises.

    R1 and R2 constitute a voltage divider. How "stiff" do you want to make that as a voltage reference?
     
  6. WBahn

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    Mar 31, 2012
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    The problem is a bit sloppy. The problem gives V+ and V-, which are not noted on the diagram. You are assuming that V+ refers to Va and that V- refers to Vb. That's about the only reasonable assumption you can make, but the problem shouldn't be forcing you to make those kinds of assumptions. That sloppiness may carry over to other, less obvious aspects of the problem.

    For instance. It talks about "the load line" as those this is a single, universally defined thing. But it's not. It this context it generally refers to the constraints that the linear part of a circuit place on the operating point of a nonlinear device, which is the "load". This is usually done by plotting the voltage-current characteristic at a chosen point in the circuit but in terms of the behavior of different parts of the circuit that come together at that point. So you have to choose which voltage and which current you are going to use. The problem implies that there's only one choice, but that choice isn't obvious. Which voltage and current do you think might be most reasonable?

    Given what the part (b) is asking for. You might consider producing a plot of I_C vs V_EC for this circuit and seeing what it suggests for the Q point.
     
  7. WBahn

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    In general there won't be a single pair of values for R1 and R2. If you make them too small (while picking the ratio to achieve what you want) then you will have a very stiff bias point but you will use a lot of power in the bias circuit and you will be less sensitive to the input signal. If you make them too large, then you will be very sensitive to variations in transistor parameters, particularly beta. The problem gives no guidance on how to trade these off, so you get to decide -- and defend your decision. What are your thoughts one how you might trade them off?
     
  8. MrChips

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    In other words, what input impedance would you choose in your design for your amplifier?
     
  9. WBahn

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    That's certainly a big part of it. But just picking a desired input impedance does not address the issue of sensitivity to device parameter variation.
     
  10. Cyberduke

    Thread Starter Active Member

    Mar 5, 2011
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    yes, I do agree that the problem is probably a bit ill defined (welcome to electronics am I right?)

    So if we plot Ic vs Vec then we will need to plot the max values for each and then divide them by 2. As stated earlier I believe the Max for Vce is 10V and for Ic 2mA.
    This making my Q point Vce=5V and Ic = 1mA. Then we can easily solve the other transtor currents and voltages.

    Comming back to R1 and R2 then, I am not sure how we will deal with that. Consider what Mr Chips said about not solving for them alaytically. But I have no idea what you mean about the stiffness.
     
  11. Cyberduke

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    Mar 5, 2011
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    Ahh sorry I see now you guys have elaborated more on R1 and R2, let me read that then post again
     
  12. Cyberduke

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    Mar 5, 2011
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    Maybe due to the lack of information, we can estimate an "in the middle" solution.

    To be honest my knowledge is now being stretched a bit. Wouldn't it help if we somehow matched input=output inpedance(which is an issue since we dont have input impedance values, this is considering the transistor as an input for some other output.)

    maybe setting Rth=the impedance "seen" at the base?
     
  13. MrChips

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    Pick any input impedance.
    Your output impedance is about 4kΩ.
    Try an input impedance of 10kΩ, just for starters.
     
  14. Cyberduke

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    Mar 5, 2011
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    If we apply this bias stable condition then it all becomes easy solving R1 and R2

    RTH = 0,1(1 + B)RE
     
  15. Cyberduke

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    Mar 5, 2011
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    Sorry for that short post, But I suddenly got an idea and was exited.

    So that seems to be a condition forcing Rth to a value after we got the Q point, to ensure Bias stability. Then having an analytical value for Rth and then with some manipulation Vth and then R1 and R2.
    I
     
  16. WBahn

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    Wouldn't that depend on where the output is taken from? The problem doesn't indicate whether this is common-emitter, common-collector, or conceivably something else. It's probably common-emitter, but I don't think there's any reason to make that assumption to answer the problem as asked.
     
  17. MrChips

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    It states in the problem RE = 500Ω and RC = 4.5kΩ. That makes it common-emitter.
     
  18. WBahn

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    How does that make it common-emitter? Why can't it be common-collector with Re = 500 Ω and then Rc chosen to absorb as much heat as possible instead of the requiring the transistor to do it?
     
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