ATtiny I/O Current

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Hi, while reading the ATTiny datasheet, I came across a note I would like clarification on. According to the datasheet, max current per I/O pin and Vcc/GND pins is shown below:

85ds1.png

However under Electrical Characters there are these notes:

" 4. Although each I/O port can sink more than the test conditions (10 mA at VCC = 5V, 5 mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed: 1] The sum of all IOL, for all ports, should not exceed 60 mA. If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test condition.

5. Although each I/O port can source more than the test conditions (10 mA at VCC = 5V, 5 mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed: 1] The sum of all IOH, for all ports, should not exceed 60 mA. If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current greater than the listed test condition. "

What exactly is 'port' referring to? How do notes #4 and #5 relate to the maximum ratings? In other words, what is likely to happen if current exceeds 60mA? For example, pins 0 & 1 each sink 40mA for a total of 80mA for 10 minutes.

I can include a schematic if necessary.

Regards,
Mark

85ds2.png85ds3.png
 
Last edited:

MrChips

Joined Oct 2, 2009
34,629
By "port" they are referring to any input/output pin.

Absolute Maximum Ratings must never be exceeded.

Don't expect to source or sink more than 5mA from any one I/O pin. Use an external driver if you need more current.
Don't expect to use more than 8-10 I/O pins with >5mA loads.
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Dont expect to source or sink more than 5mA from any one I/O pin. Use an external driver if you need more current.
Don't expect to use more than 8-10 I/O pins with >5mA loads.
How did you conclude this from the data provided? I understand it's in good form to use a driver however my question is about getting the most power without drivers while staying within tolerance.

Give me a moment to prepare the schematic..
 

MrChips

Joined Oct 2, 2009
34,629
How did you conclude this from the data provided? I understand it's in good form to use a driver however my question is about getting the most power without drivers while staying within tolerance.

Give me a moment to prepare the schematic..
Conservative engineering design. Never push a component to its limit.
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Conservative engineering design. Never push a component to its limit.
Fair enough, I'll upgrade my design with a driver.

Regarding notes 4 & 5, I understand it that if current >60mA, VOL will be higher and VOH will be lower than shown so on/off states will be harder to distinguish. All this being said, why declare a maximum of 40mA per pin and 200mA total?
 

BobTPH

Joined Jun 5, 2013
11,466
Because there is a difference between damaging the chip and not meeting the output specifications.

Absolute maximum ratings, when exceeded, can permanently damage the chip. This is not stated explicitly in the datasheet because it is common to the interpretation of all data sheets.

Bob
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Because there is a difference between damaging the chip and not meeting the output specifications.

Absolute maximum ratings, when exceeded, can permanently damage the chip. This is not stated explicitly in the datasheet because it is common to the interpretation of all data sheets.

Bob
Yes I understand but is it possible to predict what is likely to happen?

The reason I made this topic is to understand why they would declare the maximum current at 200mA when they know that beyond 60mA yields what I'll refer to as "poor" performance. On top of that its recommended to derate components for even less current.

Sounds like another no man's land kind of discovery. I'm willing to burn up a few chips to see their limits.
 
Last edited:

nsaspook

Joined Aug 27, 2009
16,252
Yes I understand but is it possible to predict what is likely to happen?

The reason I made this topic is to understand why they would declare the maximum current at 200mA when they know that beyond 60mA yields what I'll refer to as "poor" performance.

Sounds like another no man's land kind of discovery. I'm willing to burn up a few chips to see their limits.
Knock yourself out but don't design beyond the published limits even if it runs far outside those limits for a short test time. There are fatal chip die level effects from over-stressing that can happen quickly or slowly and permanently.
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Knock yourself out but don't design beyond the published limits even if it runs far outside those limits for a short test time. There are fatal chip die level effects from over-stressing that can happen quickly or slowly and permanently.
I usually stay well under the limits. I read the notes and thought there must be some correlation to the maximum ratings. I have asked similar questions regarding parameters listed as Notes and it sounds like the answer to this is the usual 'don't do it' which is good to know. If you have the ATtiny schematic handy let me know..
 

BobTPH

Joined Jun 5, 2013
11,466
Go ahead and exceed the lower limits and check the output voltages to see if they work for you, but I would not recommend exceeding the abs limits unless your intent is to see how it fails.

Bob
 

Ya’akov

Joined Jan 27, 2019
10,226
The absolute maximum rating on a datasheet means the device will be damaged if it is exceeded, it is not an operational specification. Each of them can be used to ensure that even extreme conditions will not make a device inoperable.

From Analog:

"The absolute maximum ratings indicate the limits that a device can tolerate, but not operate at. For example, having an input voltage greater than the absolute maximum causes the input differential pairs of the op amp to breakdown leading to excessive fault current."
 

nsaspook

Joined Aug 27, 2009
16,252
I was hoping for the complete schematic of the IC. The block diagram is given in the datasheet so I assume the complete schematic to be proprietary or very large?
Yes, it's proprietary, large, only part of a much larger production physical specification that determines device limits and there's no technical reason, as a casual device user, for you, as a user, to have it.
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Yes, it's proprietary, large, only part of a much larger production physical specification that determines device limits and there's no technical reason, as a casual device user, for you, as a user, to have it.
And even if you had it, what would it tell you about the current limits?

Bob
I don't know what it would tell me. I am certain however it would tell me something. At the very least, it would be the empirical foundation to base all working assumptions to augment what's given in the datasheet.

If the schematic is unavailable, how likely is this chip to be cloned? The perpetrators would have to reverse engineer it likely leading to all kinds of errors..
 

nsaspook

Joined Aug 27, 2009
16,252
I don't know what it would tell me. I am certain however it would tell me something. At the very least, it would be the empirical foundation to base all working assumptions to augment what's given in the datasheet.

If the schematic is unavailable, how likely is this chip to be cloned? The perpetrators would have to reverse engineer it likely leading to all kinds of errors..
Many controllers have been cloned (8051 clones are everywhere).
https://medium.com/supplyframe-hardware/the-grand-old-8051-microcontroller-a541385c725b

Try to find the complete schematic of a 8051.
 
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