Hello,
I'm a student working on an H-bridge schematic. The design should be fairly straightforward, but I've been having trouble with this bug for the last two days. I was hoping someone might give me a hint how I could fix this circuit. The bug is as follows:


The H-bridge is being driven by an Infineon 1ED3122 driver and has UF3SC cascodes. Infineon released a half-bridge using these drivers that I used as a guideline for how to hook up the 1ED3122 component. The link to this is here:
https://design.infineon.com/tinadem...lf-Bridge_1ED3122MC12H_galvanic_isolation.TSC

The symbols for all of the components are below. I'm new to LTSpice and circuit modeling in general, so I would really appreciate any help or guidance. Also, please let me know if this is posted in the wrong place. I found a similar thread from 7 years ago on this forum, so I thought this would be an appropriate place to ask.

Thank you

 

hi vk,
Welcome to AAC.
Please post your txt file.
E

 

hi vk,
Welcome to AAC.
Please post your txt file.
E

Just to confirm, you mean these two files, correct? I got the symbol for the 1ED driver from the lib file(I opened it in LTSpice and made the subcircuit into a symbol)

 

I think the jfet_1200 model has an undefined parameter bt.

 

I think the jfet_1200 model has an undefined parameter bt.

How would I fix this?

 

Not guaranteed, but you could try adding .param bt= 200 to your schematic, or within the jfet_1200 model itself. (bt is the transistor beta parameter; 200 is just a trial value).

 

Hi

I rewired your h-bridge and adjusted the comparator params.
It will simulate now. Might not need the "E" sources.